Teledyne LeCroy QPHY-DDR4 - Manual (Page 29)

QPHY-DDR4 Software Option
QPHY-DDR4 Test Descriptions
Clock Tests (Ck Diff)
There are 8 tests run in this group. The tests that are run are:
1. tCK(avg), tCK(abs)
2. tCH(avg), tCL(avg), tCH(abs), tCL(abs)
3. tJIT(duty)
4. tJIT(per)_total
5. tJIT(per)_dj
6. tJIT(cc)_total
7. tJIT(cc)_dj
8. tERR(n per)
Each of these tests is described in detail below.
tCK(avg), Average Clock Period
tCK(avg) is calculated as the average clock period across any consecutive 200 cycle window, where each
clock period is calculated from rising edge to rising edge.
tCK(abs), Absolute Clock Period
tCK(abs) is defined as the absolute clock period, as measured from one rising edge to the next
consecutive rising edge.
tCH(avg), Average High Pulse Width
tCH(avg) is defined as the average high pulse width, as calculated across any consecutive 200 high
pulses.
tCL(avg), Average Low Pulse Width
tCL(avg) is defined as the average low pulse width, as calculated across any consecutive 200 low pulses.
tCH(abs), Absolute High Pulse Width
tCH(abs) is the absolute instantaneous clock high pulse width, as measured from one rising edge to the
following falling edge.
tCL(abs), Absolute Low Pulse Width
tCL(abs) is the absolute instantaneous clock low pulse width, as measured from one falling edge to the
following rising edge.
tJIT(duty), Half Period Jitter
tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter over 200 consecutive cycles.
tCH jitter is the largest deviation of any single tCH from tCH(avg) and tCL jitter is the largest deviation of
any single tCL from tCL(avg).
tJIT(duty) = Min/max of {tJIT(CH), tJIT(CL)} where, tJIT(CH) = {tCHi - tCH(avg) where i=1 to 200} and
tJIT(CL) = {tCLi - tCL(avg) where i=1 to 200}.
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