Cirrus Logic CS4271 - Manual (Page 40)

CS4271
40 DS592F1
8.2.4 Soft Volume Ramp-Up After Error (Bit 3)
Function:
An un-mute will be performed after executing a filter mode change, after a MCLK/LRCK ratio change
or error, and after changing the Functional Mode. When this bit is set, this un-mute is effected, similar
to attenuation changes, by the Soft and ZeroCross bits in the DAC Volume & Mixing Control register.
When cleared, an immediate un-mute is performed in these instances.
Note: For best results, it is recommended that this feature be used with the RMP_DN bit.
8.2.5 Soft Ramp-Down Before Filter Mode Change (Bit 2)
Function:
A mute will be performed prior to executing a filter mode change. When this bit is set, this mute is
effected, similar to attenuation changes, by the Soft and ZeroCross bits in the DAC Volume & Mixing
Control register. When cleared, an immediate mute is performed prior to executing a filter mode
change.
Note: For best results, it is recommended that this feature be used in conjunction with the RMP_UP
bit.
8.2.6 Invert Signal Polarity (Bits 1:0)
Function:
When set, this bit activates an inversion of the signal polarity for the appropriate channel. This is use-
ful if a board layout error has occurred, or other situations where a 180 degree phase shift is desirable.
8.3 DAC Volume & Mixing Control - Address 03h
8.3.1 Channel B Volume = Channel A Volume (Bit 6)
Function:
The AOUTA and AOUTB volume levels are independently controlled by the A and the B Channel Vol-
ume Control Bytes when this function is disabled. The volume on both AOUTA and AOUTB are de-
termined by the A Channel Volume Control Byte and the B Channel Byte is ignored when this function
is enabled. Volume and muting functions are effected by the Soft Ramp and ZeroCross functions be-
low.
8.3.2 Soft Ramp or Zero Cross Enable (Bits 5:4)
Function:
Soft Ramp Enable
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally
ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock
periods. See Table 14 on page 41.
Zero Cross Enable
Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will
occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur
after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample
rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
7 6 5 4 3 2 1 0
Reserved B=A Soft ZeroCross ATAPI3 ATAPI2 ATAPI1 ATAPI0