Cs4271 – Cirrus Logic CS4271 User Manual
Page 6
CS4271
6
DS592F1
Pin Name
#
Pin Description
XTO
XTI
1,2
Crystal Connections (Input/Output) - I/O pins for an external crystal which may be used to generate
MCLK. See “Crystal Applications (XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
MCLK
3
Master Clock (Input/Output) -Clock source for the delta-sigma modulators. See “Crystal Applications
(XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
LRCK
4
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
SCLK
5
Serial Clock (Input/Output) - Serial clock for the serial audio interface.
SDOUT
6
Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
SDIN
7
Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
DGND
8
Digital Ground (Input) - Ground reference for the internal digital section.
VD
9
Digital Power (Input) - Positive power for the internal digital section.
VL
10
Logic Power (Input) - Positive power for the digital input/output interface.
SCL/CCLK
11
Serial Control Port Clock (Input) - Serial clock for the serial control port.
SDA/CDIN
12
Serial Control Data (Input/Output) - SDA is a data I/O in I²C mode. CDIN is the input data line for the
control port interface in SPI mode.
AD0/CS
13
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C mode; CS
is the chip select signal for SPI format.
RST
14
Reset (Input) - The device enters a low power mode when this pin is driven low.
VQ1
15
Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
VQ2
16
Quiescent Voltage (Input) - Connection for internal quiescent reference voltage.
AINA
AINB
17,
18
Analog Input (Input) - The full scale input level is specified in the ADC Analog Characteristics specifica-
tion table.
VQ3
19
Quiescent Voltage (Input) - Connection for internal quiescent reference voltage.
VA
20
Analog Power (Input) - Positive power for the internal analog section.
AGND
21
Analog Ground (Input) - Ground reference for the internal analog section.
FILT+
22
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
AMUTEC
23
Channel A Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
master clock to left/right clock frequency ratio is incorrect, or power-down.
AOUTA-
AOUTA+
AOUTB+
AOUTB-
24,
25,
26,
27
Differential Analog Audio Output (Output) - The full scale differential output level is specified in the
DAC Analog Characteristics specification table.
BMUTEC
28
Channel B Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
master clock to left/right clock frequency ratio is incorrect, or power-down.