Cirrus Logic CS8900A - Manual (Page 85)

DS271F5 85
CS8900A
Crystal LAN™ Ethernet Controller
CIRRUS LOGIC PRODUCT DATASHEET
This section describes buffering and transfer-
ring held receive frames. Section 5.3 on
page 90 through Section 5.5 on page 96 de-
scribe DMAed receive frames.
5.2.5 Buffering Held Receive Frames
If space is available, an incoming frame will be
temporarily stored in on-chip RAM, where it
awaits processing by the host. Although this
receive frame now occupies on-chip memory,
the CS8900A does not commit the memory
space to it until one of the following two condi-
tions is true:
1) The entire frame has been received and
the host has learned about the frame by
reading the RxEvent register (Register 4),
either directly or through the ISQ.
Or:
2) The frame has been partially received,
causing either the RxDest bit (Register C,
BufEvent, Bit F) or the Rx128 bit (Register
C, BufEvent, Bit B) to become set, and the
host has learned about the receive frame
by reading the BufEvent register (Register
C), either directly or through the ISQ.
When the CS8900A commits buffer space to a
particular held receive frame (termed a com-
mitted received frame), no data from subse-
quent frames can be written to that buffer
space until the frame is freed from commit-
ment. (The committed received frame may or
may not have been received error free.)
A received frame is freed from commitment by
any one of the following conditions:
1) The host reads the entire frame sequential-
ly in the order that it was received (first byte
in, first byte out).
Or:
2) The host reads part or none of the frame,
and then issues a Skip command by set-
ting the Skip_1 bit (Register 3, RxCFG, bit
6).
Or:
3) The host reads part of the frame and then
reads the RxEvent register (Register 5), ei-
ther directly or through the ISQ, and learns
of another receive frame. This condition is
called an "implied Skip". Ensure that the
host does not do “implied skips.”
Both early interrupts are disabled whenever
there is a committed receive frame waiting to
be processed by the host.
5.2.6 Transferring Held Receive Frames
The host can read-out held receive frames in
Memory or I/O space. To transfer frames in
Memory space, the host executes repetitive
Move instructions (REP MOVS) from Packet-
Page base + 0404h. To transfer frames in I/O
space, the host executes repetitive In instruc-
tions (REP IN) from I/O base + 0000h, with
status and length preceding the frame.
There are three possible ways that the host
can learn the status of a particular frame. It
can:
1) Read the Interrupt Status Queue;
2) Read the RxEvent register directly
(Register4); or
3) Read the RxStatus register (PacketPage
base + 0400h).
5.2.7 Receive Frame Visibility
Only one receive frame is visible to the host at
a time. The receive frame's status can be read
from the RxStatus register (PacketPage base
+ 0400h), and its length can be read from the
RxLength register (PacketPage base +
0402h). For more information about Memory
space operation, see Section 4.9 on page 73.
For more information about I/O space opera-
tion, see Section 4.10 on page 75.