Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 111)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
111
Switchback
In addition to the switchback sources listed in the High-Speed Microcontroller User’s Guide, the following sources can also trigger a
switchback:
• Serial start bit detected, serial port 2
• Transmit buffer loaded, serial port 2
• Ethernet activity (when the Ethernet controller is in sleep mode and the Ethernet power-management
interrupt has been enabled)
• CAN 0 bus activity (CAN0BA = 1), provided that the CAN controller is in one of the following states: CRST = 1, SWINT = 1, or
PDE = 1
Stop Mode
Stop mode can only be invoked if the CAN processor has been disabled (by either the CRST or SWINT bits) and the Ethernet controller
is in sleep mode. The stop (PCON.1) bit cannot be set until both of these conditions have been met.
Pin States In Idle Or Stop Mode
When either idle or stop modes are invoked, the pins exhibit the following states:
Note 1: Pin continues driving the same output state as was present when idle or stop modes were invoked. Since idle mode does not stop internal clocks, it does not nec-
essarily force static states on alternate function pins with dedicated hardware driven by internal clocks (e.g., timer 2 clock output, 1-Wire master, Ethernet MII outputs, etc.)
if that hardware has been configured to operate before Idle mode was invoked.
Note 2: Port reflects the data stored in the corresponding Port SFR.
Switching Between Clock Sources
The ring oscillator on the DS80C400 is similar to that on the DS80C320. As such, it does not support the run from ring feature, which
allows the microcontroller to use the ring oscillator as a clock source after the external crystal has stabilized (CKRY = 1). The ring oscil-
lator is used exclusively for resumption from stop mode when this feature has been enabled (RGSL = 1). The DS80C400 ring oscilla-
tor operates at approximately 15MHz.
ADDENDUM TO SECTION 8: RESET CONDITIONS
This section supersedes the corresponding section in the High-Speed Microcontroller User’s Guide.
The microcontroller provides several ways to place the CPU in a reset state. It also offers the means for software to determine the cause
of a reset. The reset state of most register bits is independent of the cause of the reset, but selected bits do depend on the reset source.
The reset sources, the reset state, and the function of the RSTOL pin are described in this section.
Reset Sources
The microcontroller has four ways of entering a reset state, described as follows:
• Power-on/power-fail reset
• Watchdog timer reset
• External reset
• Oscillator fail-detect reset
PIN PIN STATE DRIVE STRENGTH
ALE, PSEN 1 I OH3
MII Outputs
(TX_EN, TXD[3:0], MDC, MDIO)
No change (Note 1) I OH3 or I OL2
1-Wire Master I/O (OW, OWSTP) No change (Note 1) Open drain or I OL3
Memory Interface Pins
Port 0, Port 2, and Ports 3, 4, 5, 6, 7 (when used as any
of the following: A21–A0, WR, RD, CE0–7, PCE0-3)
1 I OH1
Port I/O pin Port data (Note 2) I OHI or I OL1
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