Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 129)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
129
ADDENDUM TO SECTION 13: TIMED-ACCESS PROTECTION
A number of timed-access-protected bits are associated with the new features of the DS80C400. Please consult the High-Speed
Microcontroller User’s Guide for complete information on the use of the timed-access feature.
SFR BIT(S) BIT NAME FUNCTION
EXIF (91h) EXIF.0 BGS Bandgap select
P4CNT (92h) P4CNT.5–0 Port 4 pin configuration control bits
ACON (9Dh) ACON.5 MROM Merge ROM assignment
ACON.4 BPME Breakpoint mode enable
ACON.3 BROM Bypass ROM
ACON.2 SA Stack address mode
ACON.1-0 AM1-AM0 Address mode-select bits
P5CNT (A2h) P5CNT.2-0 Port 5 pin configuration control bits
C0C (A3h) C0C.3 CRST CAN 0 reset
P6CNT (B2h) P6CNT.5–0 Port 6 pin configuration control bits
MCON (C6h) MCON.7-6 IDM1-IDM0 Internal memory configuration bits
MCON.5 CMA CAN data memory assignment
MCON.3–0 PDCE3–PDCE0 Program/data chip enables
COR (CEh) COR.7 IRDACK IRDA clock output enable
COR.4-3 C0BPR7-C0BPR6 CAN 0 baud-rate prescale bits
COR.2-1 COD1-COD0 CAN clock output divide bits
COR.0 CLKOE CAN clock output enable
MCON1 (D6h) MCON1.3–0 PDCE7–PDCE4 Program/data chip enable
MCON2 (D7h) MCON2.6-4 WPR2-WPR0 Write-protect range bits
MCON2.3–0 WPE3–WPE0 Write-protect enable bits
WDCON (D8h) WDCON.6 POR Power-on reset flag
WDCON.3 WDIF Watchdog interrupt flag
WDCON.1 EWT Watchdog reset enable
WDCON.0 RWT Reset watchdog timer
EBS (E5h) EBS.7 FPE Flush filter failed-packet enable
EBS.4–0 BS4–BS0 Buffer size configuration bits
ADDENDUM TO SECTION 14: REAL-TIME CLOCK
No changes. Not applicable to the network microcontroller.
ADDENDUM TO SECTION 15: BATTERY BACKUP
No changes. Not applicable to the network microcontroller.
Maxim Integrated