Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 124)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
124
ADDENDUM TO SECTION 12: SERIAL I/O
The DS80C400 high-speed microcontroller provides a third fully independent UART (serial port 2) nearly identical to the second serial
port (serial port 1). The transmit and receive pins associated with the third serial port are alternate functions for P6.7 (TXD2) and P6.6
(RXD2). The primary functional difference between the third serial port and the previous two is that it can only use timer 3 for baud clock
generation in asynchronous serial modes 1 and 3.
The third UART has its own control register (SCON2: FEh) and transmit/receive buffer (SBUF2: FFh). These two registers, and others
related to operation of the third serial port, are summarized in Table 12-1.
Table 12-1. Serial Port 2 Special Function Registers/Bits
Serial Mode Summary
All three serial ports provide four operating modes. These serial modes offer different communication protocols and baud rates. The
four serial operating modes are shown in Table 12-2. Full details of each serial mode of operation are provided in the High-Speed
Microcontroller User’s Guide. The DS80C400 includes a clock multiplier that, when utilized, can affect the serial baud clock for certain
modes. Provisions for use of the serial ports in conjunction with the clock multiplier and power-management mode are discussed later
in this section.
Table 12-2. Serial I/O Modes
†Use of the clock multiplier or power-management mode affects the baud clock.
Baud Rates
Each serial mode has baud-rate-generating hardware associated with it. This hardware must be properly configured by the user prior
to operation of the serial port. The following baud-rate descriptions are separated by mode. Block diagrams have also been included
to show any deviations from the diagrams included in the High-Speed Microcontroller User’s Guide. Note that the baud clock input cor-
responding to the power-management mode has been omitted from each of the block diagrams. Reference Table 12-3 for power-man-
agement mode baud clock rates.
BAUD CLOCK OPTIONS LISTED
BY SERIAL PORT †
SERIAL
MODE
SYNC/
ASYNC
0 1 2
DATA
BITS
START/STOP BITS
9TH BIT
FUNCTION
0 Sync 4t CLK or 12t CLK 8 None None
1 Async Timer 1 or 2 Timer 1 Timer 3 8 1 start, 1 stop None
2 Async 32t CLK or 64t CLK 9 1 start, 1 stop 0, 1, parity
3 Async Timer 1 or 2 Timer 1 Timer 3 9 1 start, 1 stop 0, 1, parity
BIT NAMES DESCRIPTION REGISTER LOCATION BIT POSITIONS
SM0/FE_2 Serial mode select 0 or framing SCON2–FEh SCON2.7
SM1_2 Serial mode select 1 SCON2–FEh SCON2.6
SM2_2 Serial mode select 2 SCON2–FEh SCON2.5
REN_2 Receive enable SCON2–FEh SCON2.4
TB8_2 9th transmit data bit SCON2–FEh SCON2.3
RB8_2 9th receive data bit SCON2–FEh SCON2.2
TI_2 Transmit interrupt flag SCON2–FEh SCON2.1
R1_2 Receive interrupt flag SCON2–FEh SCON2.0
SMOD_2 Baud-rate doubler bit T3CM–FDh T3CM.4
SPTA2 Serial port 2 transmit activity STATUS1–F7h STATUS1.1
SPRA2 Serial port 2 receive activity STATUS1–F7h STATUS1.0
SMOD0 Framing error-detection enable PCON–87h PCON.6
— Serial data buffer SBUF2–FFh —
— Slave address mask enable SADEN2–F1h —
— Slave address SADDR2–D9h —
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