Cypress enCoRe CY7C63310 - Manual (Page 45)

CY7C63310, CY7C638xx
Document 38-08035 Rev. *K Page 45 of 83
Table 16-8. Programmable Interval Timer High (PITMRH) [0x27] [R]
Bit # 7 6 5 4 3 2 1 0
Field Reserved Prog Interval Timer [11:8]
Read/Write – – – – R R R R
Default 0 0 0 0 0 0 0 0
Bit [7:4]: Reserved
Bit [3:0]: Prog Internal Timer [11:8]
This register holds the high order nibble of the 12-bit programmable interval timer. Reading this register returns the high order
nibble of the 12-bit timer at the instant that the low order byte was last read.
Table 16-9. Programmable Interval Reload Low (PIRL) [0x28] [R/W]
Bit # 7 6 5 4 3 2 1 0
Field Prog Interval [7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Default 0 0 0 0 0 0 0 0
Bit [7:0]: Prog Interval [7:0]
This register holds the lower 8 bits of the timer. When writing into the 12-bit reload register, write the lower byte first then the higher
nibble.
Table 16-10. Programmable Interval Reload High (PIRH) [0x29] [R/W]
Bit # 7 6 5 4 3 2 1 0
Field Reserved Prog Interval[11:8]
Read/Write – – – – R/W R/W R/W R/W
Default 0 0 0 0 0 0 0 0
Bit [7:4]: Reserved
Bit [3:0]: Prog Interval [11:8]
This register holds the higher 4 bits of the timer. While writing into the 12-bit reload register, write the lower byte first then the higher
nibble.
Figure 16-2. Programmable Interval Timer Block Diagram
S y s t e m
C l o c k
C l o c k
T i m e r
C o n f i g u r a t i o n
S t a t u s a n d
C o n t r o l
1 2 - b i t
r e l o a d
v a l u e
1 2 - b i t d o w n
c o u n t e r
1 2 - b i t
r e l o a d
c o u n t e r
I n t e r r u p t
C o n t r o l l e r
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