ADLINK PXI-2208 - Manual (Page 96)

84 Operation Theory
The SSI/PXI Mechanism
We adopt master-slave configuration for SSI/PXI. In a system,
for each timing signal, there shall be only one master, and
other cards are SSI slaves or with SSI function disabled.
For each timing signal, the SSI master does not have to be in a
single card. For example:
We want to synchronize the A/D operation through the
ADCONV signal for four DAQ-/DAQe-/PXI-2204/2205/2206/
2208 cards. Card 1 is the master, and Card 2, 3, 4 are slaves.
Card 1 receives an external digital trigger to start the post trig-
ger mode acquisition. The SSI setting could be:
X
Set the SSI_ADCONV signal of Card 1 to be the master.
X
Set the SSI_ADCONV signals of Card 2, 3, 4 to be the
slaves.
X
Set external digital trigger for Card 1’s A/D operation.
X
Set the SI_counter and the post scan counter (PSC) of all
other cards.
X Start DMA operations for all cards, so all the cards are wait-
ing for the trigger event.
When the digital trigger condition of Card 1 occurs, Card 1 will
internally generate the ADCONV signal and output this
ADCONV signal to SSI_ADCONV signal of Card 2, 3 and 4
through the SSI/PXI connectors. Thus we can achieve 16-
channel acquisition simultaneously.
You could arbitrarily choose each of the six timing signals as
the SSI master from any one of the cards. The SSI master can
output the internal timing signals to the SSI slaves. With the
SSI, users could achieve better card-to-card synchronization.
Note that when power-up or reset, the DAQ timing signals are
reset to use the internal generated timing signals.