ADLINK PCIe-9814 - Manual (Page 7)

List of Figures vii
PCIe-9814
List of Figures
Figure 1-1: Analog Input Channel Bandwidth, ±0.2 Vpp............... 4
Figure 1-2: PCIe-9814 Schematic................................................. 8
Figure 1-3: PCIe-9814 I/O Array ................................................... 9
Figure 3-1: Analog Input Architecture ......................................... 13
Figure 3-2: Linked List of PCI Address DMA Descriptors ........... 16
Figure 3-3: Synchronous Digital Input Operations ...................... 17
Figure 3-4: Trigger Architecture .................................................. 17
Figure 3-5: External Digital Trigger ............................................. 18
Figure 3-6: Post-Trigger Acquisition ........................................... 19
Figure 3-7: Delayed Trigger Mode Acquisition............................ 20
Figure 3-8: Pre-Trigger Mode Acquisition ................................... 20
Figure 3-9: Middle Trigger Mode Acquisition .............................. 21
Figure 3-10: Re-Trigger Mode Acquisition .................................... 21
Figure 3-11: PCIe-9814 Clock Architecture .................................. 22
Figure 3-12: PCIe-9814 Timebase Architecture ........................... 23
Figure 3-13: Basic Digitizer Acquisition Timing............................. 24
Figure 3-14: Varying Sampling Rates by Adjusting
Scan Interval Counter............................................... 24
Figure 3-15: Card Number Configuration Switch .......................... 27
Figure 3-16: Flash Memory Configuration Switch......................... 29