Document Outline

• 653X User Manual
• Important Information
  • Warranty
  • Copyright
  • Trademarks
  • WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS
• Compliance
• Conventions
• Contents
• Chapter 1 Getting Started with Your 653X
  • 653X Device Overview
    • Control Lines
  • What You Need to Get Started
  • Choosing Your Programming Software
    • National Instruments Application Software
    • NIDAQ Driver Software
      • Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and Your Hardware
  • Installing Your Software
  • Unpacking Your 653XDevice
  • Installing Your 653XDevice
    • Installing the PCI-DIO-32HS, PCI-6534, or PCI-7030/6533
    • Installing the PXI-6533, PXI-6534, or PXI-7030/6533
    • Installing the AT-DIO-32HS
    • Installing the DAQCard-6533 for PCMCIA
  • Configuring the 653X
    • In Windows
    • In Mac OS
• Chapter 2 Using Your 653X
  • Choosing the Correct Mode for Your Application
  • Controlling and Monitoring Static Digital Lines—Unstrobed I/O
    • Configuring Digital Lines
      • Standard Output
      • Wired-OR Output
    • Using Control Lines as Extra Unstrobed Data Lines
      • Table 2-1. Port 4 Lines
    • Connecting Signals
    • Creating a Program
      • Figure 2-1. Programming Unstrobed I/O in NI-DAQ
      • Figure 2-2. Programming Unstrobed I/O in LabVIEW/LabVIEW RT
      • Programming the Control/Timing Lines as Extra Unstrobed Data Lines
  • Transferring Data Between Two Devices—HandshakingI/O
    • Deciding the Width of Data to Transfer
      • Table 2-2. Port and Timing Controller Combinations
    • Deciding Data Transfer Direction
    • Deciding Which Handshaking Protocol to Use
    • Using the Burst Protocol
      • Deciding the PCLK Signal Direction
    • Selecting ACK/REQ Signal Polarity
    • Choosing Whether or Not to Use a Programmable Delay
    • Choosing Continuous or Finite Data Transfer
      • Finite Transfers
      • Continuous Input
      • Continuous Output
      • Choosing DMA or Interrupt Transfers
    • Connecting Signals
      • Figure 2-3. Connecting Signals
    • Choosing the Startup Sequence
      • Using an Initialization Order
      • Controlling Line Polarities
    • Creating a Program
      • Figure 2-4. Programming Buffered Handshaking I/O in NI-DAQ
      • Figure 2-5. Programming Unbuffered Handshaking I/O in NI-DAQ
      • Figure 2-6. Programming Handshaking Input in LabVIEW/LabVIEW RT
      • Figure 2-7. Programming Handshaking Output in LabVIEW/LabVIEW RT
  • Generating and Receiving Digital Patterns and Waveforms—Pattern I/O
    • Deciding the Width of Data to Transfer
      • Table 2-3. Port and Timing Controller Combinations
    • Deciding Transfer Direction
    • Choosing an Internal or External REQ Source
    • Deciding the REQ Polarity
    • Deciding the Transfer Rate
    • Deciding How to Start and Stop Data Transfer—Triggering
      • Figure 2-8. Starting Data Transfer Using a Trigger
      • Figure 2-9. Stopping Data Transfer Using a Trigger
      • Start and Stop Trigger
      • Figure 2-10. Using a Start and Stop Trigger
      • Figure 2-11. Pattern-Matching Trigger Example
    • Choosing Continuous or Finite Data Transfer
      • Finite Transfers
      • Continuous Input
      • Continuous Output
      • Choosing DMA or Interrupt Transfers
    • Monitoring Data Transfer
    • Connecting Signals
    • Creating a Program
      • Figure 2-12. Programming Pattern I/O (Single Buffer) in NI-DAQ
      • Figure 2-13. Programming Pattern I/O (Continuous) in NI-DAQ
      • Figure 2-14. Programming Pattern I/O in LabVIEW/LabVIEW RT
  • Monitoring Line State—Change Detection
    • Deciding the Width of Data to Acquire
      • Table 2-4. Port and Timing Controller Combinations
    • Deciding Which Lines You Want to Monitor
      • Figure 2-15. Change Detection Example Settings
    • Deciding How to Start and Stop Data Transfer—Triggering
      • Figure 2-16. Starting Data Transfer Using a Trigger
      • Figure 2-17. Stopping Data Transfer Using a Trigger
      • Start and Stop Trigger
      • Figure 2-18. Using a Start and Stop Trigger
      • Figure 2-19. Pattern-Detection Trigger Example
    • Choosing Continuous or Finite Data Transfer
      • Finite Transfers
      • Continuous Input
      • Choosing DMA or Interrupt Transfers
    • Connecting Signals
    • Creating a Program
      • Figure 2-20. Programming Change Detection (Continuous) in NI-DAQ
      • Figure 2-21. Programming Change Detection (Single Buffer) in NI-DAQ
      • Figure 2-22. Programming Change Detection for LabVIEW/LabVIEW RT
• Chapter 3 Timing Diagrams
  • Pattern I/O Timing Diagrams
    • Internal REQ Signal Source
      • Figure 3-1. Internal Request Timing Diagram
    • External REQ Signal Source
      • Figure 3-2. External Request Timing Diagram
  • Handshaking I/O Timing Diagrams
    • Comparing the Different Handshaking Protocols
      • Table 3-1. Handshaking Protocol Characteristics
    • Using the Burst Protocol
      • Figure 3-3. Burst Transfer Example (Input)
      • Figure 3-4. Burst Transfer Example (Output)
      • Figure 3-5. Burst Input Timing Diagram (Default)
      • Figure 3-6. Burst Output Timing Diagram (Default)
      • Figure 3-7. Burst Input Timing Diagram (PCLK Reversed)
      • Figure 3-8. Burst Output Timing Diagram (PCLK Reversed)
    • Using Asynchronous Protocols
    • Using the 8255-Emulation Protocol
      • Figure 3-9. 8255 Emulation Input Handshaking Sequence
      • Figure 3-10. 8255 Emulation Input State Machine
      • Figure 3-11. 8255 Emulation Output Handshaking Sequence
      • Figure 3-12. 8255 Emulation Output State Machine
      • Figure 3-13. 8255 Emulation Output Timing Diagram
    • Using the LevelACK Protocol
      • Figure 3-14. Level ACK Input Handshaking Sequence
      • Figure 3-15. Level ACK Input State Machine
      • Figure 3-16. Level ACK Input Timing Diagram
      • Figure 3-17. Level ACK Output Handshaking Sequence
      • Figure 3-18. Level ACK Output State Machine
      • Figure 3-19. Level ACK Output Timing Diagram
    • Using Protocols Based on Signal Edges
    • Using the Trailing-Edge Protocol
      • Figure 3-20. Trailing Edge Input Handshaking Sequence
      • Figure 3-21. Trailing Edge Input State Machine
      • Figure 3-22. Trailing Edge Input Timing Diagram
      • Figure 3-23. Trailing Edge Output Handshaking Sequence
      • Figure 3-24. Trailing Edge Output State Machine
      • Figure 3-25. Trailing Edge Output Timing Diagram
      • Figure 3-26. Leading Edge Input Handshaking Sequence
      • Figure 3-27. Leading Edge Input State Machine
      • Figure 3-28. Leading Edge Input Timing Diagram
      • Figure 3-29. Leading Edge Output Handshaking Sequence
      • Figure 3-30. Leading Edge Output State Machine
      • Figure 3-31. Leading Edge Output Timing Diagram
      • Figure 3-32. Long Pulse Input Handshaking Sequence
      • Figure 3-33. Long Pulse Input State Machine
      • Figure 3-34. Long Pulse Input Timing Diagram
      • Figure 3-35. Long Pulse Output Handshaking Sequence
      • Figure 3-36. Long Pulse Output State Machine
      • Figure 3-37. Long Pulse Output Timing Diagram
• Appendix A Specifications
• Appendix B Using PXI with CompactPCI
  • Table B-1. J2 Pins Used by Your PXI-653X Device
• Appendix C Connecting Signals with Accessories
  • Control Signals
  • Table C-1. Control Signals for Handshaking I/O and Pattern I/O
  • Making 68-Pin Signal Connections
  • Figure C-1. 653X I/O Connector 68-Pin Assignments
  • Table C-2. 68-Pin Accessories
  • Signal Descriptions
  • Table C-3. Signal Descriptions
  • Making 50-Pin Signal Connections
  • Figure C-2. 68-to-50-Pin Adapter Pin Assignments
  • Table C-4. 50-Pin Accessories
  • Optional Equipment for Connecting Signals
• Appendix D Hardware Considerations
  • Figure D-1. AT-DIO-32HS Block Diagram
  • Figure D-2. DAQCard-6533 for PCMCIA Block Diagram
  • Figure D-3. PCI-DIO-32HS, PCI/PXI-7030/6533, and PXI-6533 Block Diagram
  • Figure D-4. PCI/PXI-6534 Block Diagram
  • Power-On State
  • Power Connections
  • Table D-1. 653X Power Ratings
  • Selecting and Terminating Cables
  • Figure D-5. Transmission Line Terminations
  • How Much Current Can I Sink or Source?
  • Table D-2. Sink and Source Current for the 653X Devices
  • RTSI and PXI Trigger Bus Interfaces
  • Figure D-6. RTSI Bus Signal Connection
• Appendix E Optimizing Your Transfer Rates
  • Determining the Maximum Transfer Rates
  • Table E-1. Peak Transfer Rates Based on Mode and Protocol Used
  • Obtaining the Fastest Transfer Rates
  • Table E-2. Devices That Support Direct-Memory Access (DMA) Transfers
  • Interpreting Benchmark Results
  • Table E-3. AT-DIO-32HS Benchmark Results
  • Table E-4. PCI-DIO-32HS Benchmark Results
  • Table E-5. PXI-6533 Benchmark Results
  • Table E-6. DAQCard-6533 for PCMCIA Benchmark Results
  • Table E-7. PCI-6534 Benchmark Results
  • Table E-8. PXI-6534 Benchmark Results
  • Table E-9. PCI-7030/6533 Benchmark Results
  • Table E-10. PCI-7030/6533 Benchmark Results
• Appendix F Technical Support Resources
• Glossary
  • Numbers/Symbols
  • A-C
  • D
  • F
  • G-L
  • M-P
  • R-S
  • T-V
  • W
• Index
  • Numbers
  • A
  • B-C
  • D
  • E-H
  • I-N
  • O-P
  • R
  • S
  • T-V
  • W