Silicon Laboratories SI2493/57/34/15/04 - Manual (Page 24)

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24 Rev. 1.3
Figure 6. Parallel Interface
11 Bits
to Data Bus
CONTROL
Parallel I/F
Register 1
MUX
Parallel I/F
Register 0
A
0
(3)
D
0
(16)
D
1
(17)
D
2
(18)
D
3
(22)
D
4
(23)
D
5
(24)
D
6
(4)
D
7
(8)
RD
(9)
WR
(10) CS
(11)
INT
(15)
MUX
Parallel Interface Unique
Shared-Serial/Parallel
P
aral
lel mo
de
pi
n fu
n
c
tio
n
Par
allel mod
e pin nu
mb
er
TX FIFO
14 Characters
RX FIFO
12 Characters