Silicon Laboratories SI2493/57/34/15/04 - Manual (Page 43)

AN93
Rev. 1.3 43
4. Hardware Design Reference
This section describes hardware design requirements for optimum Si24xx ISOmodem chipset implementation.
There are three important considerations for any hardware design. First, the reference design and components
listed in the associated bill of materials should be followed exactly. These designs reflect field experience with
millions of deployed units throughout the world and are optimized for cost and performance. Any deviation from the
reference design schematic and components will likely have an adverse affect on performance. Second, circuit
board layouts must follow "4.4. Layout Guidelines" rigorously. Deviations from these layout techniques will likely
affect modem performance and regulatory compliance. Finally, all reference designs use a standard component
numbering scheme. This simplifies documentation references and communication with the Silicon Laboratories
technical support team. It is strongly recommended that these same component reference designators be used in
all ISOmodem designs.
4.1. Component Functions
In spite of the significant internal complexity of the chip, the external support circuitry is very simple. The following
section describes the modem’s functions in detail.
4.1.1. Power Supply and Bias Circuitry
Power supply bypassing is important for the proper operation of the ISOmodem, suppression of unwanted
radiation, and prevention of interfering signals and noise from being coupled into the modem via the power supply.
C50 and C52 provide filtering of the 3.3 V system power and must be located as close to the ISOmodem chip as
possible to minimize lead lengths. The best practice is to use surface-mount components connected between a
power plane and a ground plane. This technique minimizes the inductive effects of component leads and PCB
traces and provides bypassing over the widest possible frequency range, and minimizes loop areas that can
radiate radio frequency energy.
Two bias voltages used inside the modem chip require external bypassing and/or clamping. VDA (pin 7) is
bypassed by C51. VDB (pin 19) is bypassed by C53. R12 and R13 are optional resistors that can, in some cases,
reduce radiated emissions due to signals associated with the isolation capacitors. These components must be
located as close to the ISOmodem chip as possible to minimize lead lengths.
The Si3018/10 is powered by a small current passed across the ISOcap in the on-hook mode and by the loop
current in the off-hook mode. Since there is no system ground reference for the line-side chip due to isolation
requirements, a virtual ground, IGND, is used as a reference point for the Si3018/10. Several bias voltages and
signal reference points used inside the DAA chip require external bypassing, filtering, and/or clamping. VREG2
(pin 10) is bypassed by C6. VREG (pin 7) is bypassed by C5. These components must be located as close to the
Si3018/10 chip as possible to minimize lead lengths.
4.1.2. Hookswitch and DC Termination
The hookswitch and dc termination circuitry are shown in Figure 18 on page 46. Q1, Q2, Q3, Q4, R5. R6, R7, R8,
R15, R16, R17, R19, and R24 perform the hookswitch function. The on-hook/off-hook condition of the modem is
controlled by Si3018/10 pins 13 (QB) and 1 (QE).
4.1.3. Clocks
The crystal oscillator circuit has three operating frequencies/modes that are selected by using the correct clock
source and by installing the correct pulldown resistors on the modem in order to signal the ISOmodem which mode
to operate.
Selecting among these modes of operation is described in "2.1. Resetting the Device" on page 11.
One mode requires a 4.9152 MHz fundamental mode parallel-resonant crystal. Typical crystals require a 20 pF
load capacitance. This load is calculated as the series combination of the capacitance from each crystal terminal to
ground, including parasitic capacitance due to package pins and PCB traces. The parasitic capacitance is
estimated as 7 pF per terminal. This, in combination with the 33 pF capacitor, provides 40 pF per terminal, which,
in series, yields the proper 20 pF load for the crystal.
Instead of using a 4.9152 MHz crystal, a signal at 4.9152 MHz can be applied to the XTALI pin. In such a case, the
crystal loading caps should not be used.