Table 8-3, Table 8-4 on – Cirrus Logic EP73xx User Manual
Page 88
8-4
EP7309/11/12 User’s Manual - DS508UM4
Copyright Cirrus Logic, Inc. 2003
SRAM/Expansion Bus Controller
8
Wait States Field[2:5]: There are two tables to use to program a chip select with
a specific number of wait states. One table is specifically for 13
and 18 MHz operation and the other is for 36 MHz and above. The
operating speed of the bus will determine which table is used.
01
32-bit wide bus access
High, Low
10
Reserved
High, Low
11
8-bit wide bus access
High, Low
Table 8-3: Wait States at 13 / 18 MHz Operation
13 MHz / 18 MHz Operation
Bit 3
Bit 2
Bit 1
Bit 0
Wait States Random
Wait States Sequential
x
x
0
0
4
3
x
x
0
1
3
2
x
x
1
0
2
1
x
x
1
1
1
0
Table 8-4: Wait States at 36 MHz Operation
36 MHz Operation
Bit 3
Bit 2
Bit 1
Bit 0
Wait States Random
Wait States Sequential
0
0
0
0
8
3
0
0
0
1
7
3
0
0
1
0
6
3
0
0
1
1
5
3
0
1
0
0
4
2
0
1
0
1
3
2
0
1
1
0
2
2
0
1
1
1
1
2
1
0
0
0
8
1
1
0
0
1
7
1
1
0
1
0
6
1
1
0
1
1
5
1
1
1
0
0
4
0
1
1
0
1
3
0
1
1
1
0
2
0
1
1
1
1
1
0
Table 8-2: Bus Width Selection Settings
Bus Width Field
Expansion Transfer Mode
Port E bits 1,0 during
nPOR reset