Table 6-20 – AMD Geode SC1201 User Manual

Page 182

Advertising
background image

182

AMD Geode™ SC1200/SC1201 Processor Data Book

Core Logic Module - Register Summary

32579B

Table 6-20. F2: PCI Header Registers for IDE Controller Support Summary

F2 Index

Width

(Bits)

Type

Name

Reset

Value

Reference

(Table 6-35)

00h-01h

16

RO

Vendor Identification Register

100Bh

Page 256

02h-03h

16

RO

Device Identification Register

0502h

Page 256

04h-05h

16

R/W

PCI Command Register

0000h

Page 256

06h-07h

16

RO

PCI Status Register

0280h

Page 256

08h

8

RO

Device Revision ID Register

01h

Page 256

09h-0Bh

24

RO

PCI Class Code Register

010180h

Page 256

0Ch

8

RO

PCI Cache Line Size Register

00h

Page 256

0Dh

8

RO

PCI Latency Timer Register

00h

Page 256

0Eh

8

RO

PCI Header Type Register

00h

Page 256

0Fh

8

RO

PCI BIST Register

00h

Page 256

10h-13h

32

RO

Base Address Register 0 (F2BAR0) — Reserved for possible
future use by the Core Logic module.

00000000h

Page 256

14h-17h

32

RO

Base Address Register 1 (F2BAR1) — Reserved for possible
future use by the Core Logic module.

00000000h

Page 256

18h-1Bh

32

RO

Base Address Register 2 (F2BAR2) — Reserved for possible
future use by the Core Logic module.

00000000h

Page 256

1Ch-1Fh

32

RO

Base Address Register 3 (F2BAR3) — Reserved for possible
future use by the Core Logic module.

00000000h

Page 256

20h-23h

32

R/W

Base Address Register 4 (F2BAR4) — Sets the base address for
the I/O mapped Bus Master IDE Registers (summarized in Table
6-21)

00000001h

Page 256

24h-2Bh

---

---

Reserved

00h

Page 256

2Ch-2Dh

16

RO

Subsystem Vendor ID

100Bh

Page 256

2Eh-2Fh

16

RO

Subsystem ID

0502h

Page 256

30h-3Fh

---

---

Reserved

00h

Page 257

40h-43h

32

R/W

Channel 0 Drive 0 PIO Register

00009172h

Page 257

44h-47h

32

R/W

Channel 0 Drive 0 DMA Control Register

00077771h

Page 258

48h-4Bh

32

R/W

Channel 0 Drive 1 PIO Register

00009172h

Page 259

4Ch-4Fh

32

R/W

Channel 0 Drive 1 DMA Control Register

00077771h

Page 259

50h-53h

32

R/W

Channel 1 Drive 0 PIO Register

00009172h

Page 259

54h-57h

32

R/W

Channel 1 Drive 0 DMA Control Register

00077771h

Page 259

58h-5Bh

32

R/W

Channel 1 Drive 1 PIO Register

00009172h

Page 259

5Ch-5Fh

32

R/W

Channel 1 Drive 1 DMA Control Register

00077771h

Page 259

60h-FFh

---

---

Reserved

00h

Page 259

Advertising
This manual is related to the following products: