Contec SEH-9450-LAS - Manual (Page 96)

8. BIOS Setup
SEH-9450-LAS
89
POST
(hex)
Description
43h Test 8259 functionality.
44h Reserved
45h Reserved
46h Reserved
47h
Initialize EISA slot
48h Reserved
49h
Calculate total memory by testing the last double word of each 64K page.
Program writes allocation for AMD K5 CPU.
4Ah Reserved
4Bh Reserved
4Ch Reserved
4Dh Reserved
4Eh
Program MTRR of M1 CPU
Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range.
Initialize the APIC for P6 class CPU.
On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU
are not identical.
4Fh Reserved
50h Initialize
USB
51h Reserved
52h
Test all memory (clear all extended memory to 0)
53h Reserved
54h Reserved
55h
Display number of processors (multi-processor platform)
56h Reserved
57h
Display PnP logo
Early ISA PnP initialization
-Assign CSN to every ISA PnP device.
58h Reserved
59h
Initialize the combined Trend Anti-Virus code.
5Ah Reserved
5Bh
(Optional Feature)
Show message for entering AWDFLASH.EXE from FDD (optional)
5Ch Reserved
5Dh
Initialize Init_Onboard_Super_IO switch.
Initialize Init_Onbaord_AUDIO switch.
5Eh Reserved
5Fh Reserved
60h
Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup utility.
61h Reserved
62h Reserved
63h Reserved
64h Reserved
65h
Initialize PS/2 Mouse
66h Reserved
67h
Prepare memory size information for function call: INT 15h ax=E820h
68h Reserved
69h
Turn on L2 cache
6Ah Reserved
6Bh
Program chipset registers according to items described in Setup & Auto-configuration table.