Kontron AT8404 - Manual (Page 63)

Software Description
50 AT8404 User Guide
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4.2 Bootloader
On the AT8404 Carrier board, the bootloader ‘u-boot‘ (universal bootloader) is used. The bootloader initial-
izes the main components of the board like CPU, SDRAM, serial lines etc. for operation. After this, kernel and
application are started from Flash.
4.2.1 Power on self Test
4.2.1.1 Test Routines
Upon power on or system reset, the bootloader performs a set of Power On Self Tests (POST) to check the
integrity of specific components. Components where a POST is available are:
• SDRAM
• KCS
• PPC405 serial line
• PPC405 I2C
• PPC405 FE
In the case that a POST fails, a POST error code is written into the postcode high byte register of the onboard
FPGA. The boot process is not stopped as there are good chances the board can boot even in case of POST
errors. The postcode high byte register is also accessible by the IPMC which can report error codes to a sepa-
rate management instance. Thus more comprehensive diagnostic tests could be started.
The following table shows a list of available POST routines including POST error codes.
4.2.1.2 Boot Steps
In addition to the Power On Self Tests described above, the bootloader logs the board startup sequence in
the postcode low byte register. A postcode value is written each time a step in the start sequence has been
completed successfully. The postcode stored is also accessible by the IPMC. In the case that an error occurs
during execution of a step, the boot sequence is stopped because a fatal error has occurred with great likeli-
hood. In this case, a management instance can read the last postcode written via the IPMC and thus deter-
mine where the fatal error has occurred.
A list of defined postcodes is shown in the table below.
Table 4-1: POST routines and error codes
Device Test POST Error Code
SDRAM Data bus - walking 1 test PCW_DLINE
SDRAM Address bus - walking 1 test PCW_ALINE
SDRAM Memory - read/write test PCW_MEM
PPC405 UART Serial loopback teststring PCW_SERIAL
PPC405 I2C Bus scan for devices from I2C_ADDR_LIST PCW_I2C
PPC405 FE Phy access PCW_ETH1
PPC405 FE Phy loopback test using special Ethernet test frame PCW_ETH2
KCS KCS READY signal test KCSCTL