Maxim Integrated MAXQ7667 - Manual (Page 113)

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MAXQ7667 User’s Guide
T2MD
T2Lx 8-BIT TIMER
T2Vx
16-BIT TIMER
OR
T2Hx 8-TIMER
POSSIBLE INPUT USE:
TIMER GATE EDGE
CAPTURE/RELOAD
EDGE COUNTER
T2PBx PIN
T2OE[0]
T2OE[1] T2POL[1]
PORT LATCH
(IF PDn.q = 1, WHERE n = PORT # AND q = BIT #)
POx.x DATA
(IF PDx.x = 1)
T2Lx COMPARE
T2POL[0]
Figure 6-4. Output Enable and Polarity Control
T2CLx
EDGE DETECTION
AND GATING
C/T2
TR2L
T2MD
T2CLK
CCF[1:0]
G2EN
TR2
SS2
T2POL[0]
T2Lx
T2OE[0]
T2Vx COMPARE MATCH
OR T2Hx COMPARE MATCH
T2Lx OVERFLOW
T2Hx:T2Lx OVERFLOW
OR T2Hx OVERFLOW
T2RLx
T2Px PIN INPUT
T2CHx
T2Hx
T2RHx
Figure 6-3. Type 2 Timer Mode Selection