Maxim Integrated MAXQ7667 - Manual (Page 62)

__________________________________________________________________________________________________________ 4-18
MAXQ7667 User’s Guide
4.1.21 Frame Pointer Base Register (BP)
Register Description: Frame Pointer Base Register
Register Name: BP
Register Address: Module 0Eh, Index 07h
Bits 15 to 0: Frame Pointer Base Register Bits 15:0 (BP[15:0]). This register serves as the base pointer for the Frame Pointer (FP).
The Frame Pointer is formed by unsigned addition of Frame Pointer Base Register (BP) and Frame Pointer Offset Register (OFFS). The
content of this base pointer register is not affected by increment/decrement operations performed on the offset (OFFS) register.
4.1.22 General Register Byte-Swapped (GRS)
Register Description: General Register Byte-Swapped
Register Name: GRS
Register Address: Module 0Eh, Index 08h
Bits 15 to 0: General Register Byte-Swapped Bits 15:0 (GRS[15:0]). This register is intended primarily for supporting byte opera-
tions on 16-bit data. This 16-bit read-only register returns the byte-swapped value for the data contained in the GR register.
Bit # 15 14 13 12 11 10 9 8
Name BP15 BP14 BP13 BP12 BP11 BP10 BP9 BP8
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name BP7 BP6 BP5 BP4 BP3 BP2 BP1 BP0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
r = read, w = write
Note: This register is cleared to 0000h on all forms of reset.
Bit # 15 14 13 12 11 10 9 8
Name GRS15 GRS14 GRS13 GRS12 GRS11 GRS10 GRS9 GRS8
Reset 0 0 0 0 0 0 0 0
Access r r r r r r r r
Bit # 7 6 5 4 3 2 1 0
Name GRS7 GRS6 GRS5 GRS4 GRS3 GRS2 GRS1 GRS0
Reset 0 0 0 0 0 0 0 0
Access r r r r r r r r
r = read
Note: This register is cleared to 0000h on all forms of reset.