Maxim Integrated MAXQ7667 - Manual (Page 98)

___________________________________________________________________________________________________________ 6-4
MAXQ7667 User’s Guide
The input and output conditioning in Figure 6-1 is determined by the status/control registers T2CNAx (Type 2 timer/counter control reg-
ister A), T2CNBx (Type 2 timer/counter control register B), and T2CFGx (Type 2 timer configuration register). See Section 6.2: Type 2
Timer/Counter Peripheral Registers for a detailed discussion of these registers.
T2Vx REGISTER
16-BIT UP COUNTER
T2Rx REGISTER
16-BIT RELOAD
CAPTURE
EQUAL
OVERFLOW
RELOAD
CLOCK
T2Cx REGISTER
16-BIT CAPTURE/COMPARE
OUTPUT CONDITIONING
POLARITY SELECTION
INPUT CONDITIONING
SCALING
GATING
Figure 6-1. Type 2 Timer/Counter in 16-Bit Mode