Maxim Integrated MAXQ7667 - Manual (Page 204)

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MAXQ7667 User’s Guide
Bit 5: Break-On Register Enable (REGE). The REGE bit is used to enable the break-on register function. When the REGE bit is set to
1, BP4 and BP5 are used as register breakpoints. A break occurs when the content of BP4 is matched with the destination address of
the current instruction. For BP5, a break occurs only on a selected data pattern for a selected destination register addressed by BP5.
The data pattern is determined by the contents in the ICDA and ICDD register. The REGE bit alone does not enable register breakpoints,
but simply changes the manner in which BP4 and BP5 are used. The DME bit still must be set to logic 1 for any breakpoint to occur. This
bit has no meaning for the ROM code.
Bits 3 to 0: Command Bits 3:0 (CMD[3:0]). These bits reflect the current host command in debug mode. These bits are set by the
debug engine and allow the ROM code to determine the course of action.
CMD3 CMD2 CMD1 CMD0 ACTION
0 0 0 0 No Operation
0 0 0 1 Read Register Map
0 0 1 0 Read Data Memory
0 0 1 1 Read Stack Memory
0 1 0 0 Write Register
0 1 0 1 Write Data Memory
0 1 1 0 Trace, Single-Step the CPU
1 0 0 0 Unlock Password
1 0 0 1 Read Register
X X X X Reserved