ADLINK nanoX-BT - Manual (Page 18)

Page 18 nanoX-BT
3.3. AB Signal Description
3.3.1. Audio Signals
Signal Pin # Description I/O PU/PD Comment
AC_RST# /
HDA_RST# A30 Reset output to CODEC, active low. O 3.3VSB
AC_SYNC /
HDA_SYNC A29 Sample-synchronization signal to the CODEC(s). O 3.3V
AC_BITCLK /
HDA_BITCLK A32 Serial data clock generated by the external CODEC(s). I/O 3.3V
AC _SDOUT /
HDA_SDOUT A33 Serial TDM data output to the CODEC. O 3.3V
AC _SDIN[2:0]
HDA_SDIN[2:0] B28- B30 Serial TDM data inputs from up to 3 CODECs. I/O 3.3VSB AC_SDIN0: supported
AC_SDIN1: supported
AC_SDIN2: not supported
3.3.2. LVDS/eDP
Signal Pin # Description I/O PU/PD Comment
LVDS_A0+ / eDP_TX2+
LVDS_A0- / eDP_TX2-
LVDS_A1+ / eDP_TX1+
LVDS_A1- / eDP_TX1-
LVDS_A2+ / eDP_TX0+
LVDS_A2- / eDP_TX0+
LVDS_A3+
LVDS_A3- A71
A72
A73
A74
A75
A76
A78
A79 LVDS Channel A differential
pairs O LVDS
LVDS_A_CK+ / eDP_TX3+
LVDS_A_CK- / eDP_TX3- A81
A82 LVDS Channel A differential
clock O LVDS
LVDS_VDD_EN / eDP_VDD_EN A77 LVDS panel power enable O 3.3V
LVDS_BKLT_EN / eDP_BKLT_EN B79 LVDS panel backlight enable O 3.3V
eDP
by build option
LVDS_BKLT_CTRL / eDP_BKLT_CTRL B83 LVDS panel backlight brightness
control O 3.3V PD 100k Realtek eDP to
LVDS
requirement
LVDS_I2C_CK / eDP_AUX+ A83 DDC lines used for flat panel
detection and control. O 3.3V PU 2k2
3.3V
LVDS_I2C_DAT / eDP_AUX- A84 DDC lines used for flat panel
detection and control. I/O 3.3V PU 2k2
3.3V
RSVD / eDP_HPD A87 Digital Display Interface Hot-Plug
Detect I 3.3V