ADLINK nanoX-BT - Manual (Page 24)

Page 24 nanoX-BT
3.3.17. Serial Interface Signals
Signal Pin # Description I/O PU/PD Comment
SER0_TX A98 General purpose serial port transmitter (TTL level output) O CMOS Power rail tolerance 5V / 12V
SER0_RX A99 General purpose serial port receiver (TTL level input) I CMOS Power rail tolerance 5V / 12V
SER1_TX A101 General purpose serial port transmitter (TTL level output) O CMOS Power rail tolerance 5V / 12V
SER1_RX A102 General purpose serial port receiver (TTL level input) I CMOS Power rail tolerance 5V / 12V
3.3.18. Power And System Management
Signal Pin # Description I/O PU/PD Comment
PWRBTN# B12 Power button to bring system out of S5 (soft off), active on
falling edge. I 3.3VSB PU 10k 3.3VSB
SYS_RESET# B49 Reset button input. Active low request for module to reset and
reboot. May be falling edge sensitive. For situations when
SYS_RESET# is not able to reestablish control of the system,
PWR_OK or a power cycle may be used. I 3.3VSB PU 10k 3.3VSB
CB_RESET# B50 Reset output from module to Carrier Board. Active low. Issued
by module chipset and may result from a low SYS_RESET#
input, a low PWR_OK input, a VCC_12V power input that falls
below the minimum specification, a watchdog timeout, or may
be initiated by the module software. O 3.3VSB
PWR_OK B24 Power OK from main power supply. A high value indicates
that the power is good. This signal can be used to hold off
Module startup to allow carrier based FPGAs or other
configurable devices time to be programmed. I 3.3V PU 100k
3.3VSB
SUS_STAT# B18 Indicates imminent suspend operation; used to notify LPC
devices. O 3.3VSB
SUS_S3# A15 Indicates system is in Suspend to RAM state. Active-low
output. An inverted copy of SUS_S3# on the carrier board
(also known as “PS_ON”) may be used to enable the non-
standby power on a typical ATX power supply. O 3.3VSB
SUS_S4# A18 Indicates system is in Suspend to Disk state.
Active low output. O 3.3VSB
SUS_S5# A24 Indicates system is in Soft Off state. O 3.3VSB Not supported,
connect to SUS_S4#
WAKE0# B66 PCI Express wake up signal. I 3.3VSB PU 10k 3.3VSB Not supported,
connected to WAKE1#
WAKE1# B67 General purpose wake up signal. May be used to implement
wake-up on PS/2 keyboard or mouse activity. I 3.3VSB PU 10k 3.3VSB
BATLOW# A27 Battery low input. This signal may be driven low by external
circuitry to signal that the system battery is low, or may be
used to signal some other external power-management event. I 3.3VSB PU 10k 3.3VSB
LID# A103 LID button. Low active signal used by the ACPI operating
system for a LID switch. I OD 3.3VSB PU 10k 3.3VSB Emulate GPIO (BIOS)
SLEEP# B103 Sleep button. Low active signal used by the ACPI operating
system to bring the system to sleep state or to wake it up
again. I OD 3.3VSB PU 10K 3.3VSB Emulated GPIO (BIOS)