Altera 100G Development Kit, Stratix V GX Edition - Manual (Page 41)

Appendix A: Programming the Flash Memory Device A–5
Restoring the MAX II CPLD to the Factory Settings
August 2012 Altera Corporation 100G Development Kit, Stratix V GX Edition
User Guide
f To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the
100G Development Kit, Stratix V GX page of the Altera
website.
Restoring the MAX II CPLD to the Factory Settings
This section describes how to restore the original factory contents to the MAX II CPLD
on the 100G development board. Make sure you have the Nios II EDS installed, and
perform the following instructions:
1. Set the board switches to the factory default settings described in “Factory Default
Switch Settings” on page 4–2 .
1 Installing a shunt to MAX_JTAG_EN (J62) removes the MAX II device in
the JTAG chain.
2. Launch the Quartus II Programmer.
3. Click Auto Detect.
4. Click Add File and select <install
dir>\kits\stratixVGX_5sgxea7nf45_100g\factory_recovery\max2.pof.
5. Turn on the Program/Configure option for the added file.
6. Click Start to download the selected configuration file to the MAX II CPLD.
Configuration is complete when the progress bar reaches 100%.
f
To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the
100G Development Kit, Stratix V GX page of the Altera
website.