Altera Nios Development Board Cyclone II Edition - Manual (Page 22)

2–10 Reference Manual Altera Corporation
Nios Development Board Cyclone II Edition May 2007
Board Components
f
See www.micron.com for detailed information.
V5 63 sdram_dq14
V6 65 sdram_dq15
P3 16 sdram_dqs0
W4 51 sdram_dqs1
U2 20 sdram_dm0
AA1 47 sdram_dm1
T6 29 sdram_a0
V2 30 sdram_a1
R8 31 sdram_a2
W3 32 sdram_a3
R5 35 sdram_a4
U10 36 sdram_a5
P4 37 sdram_a6
V1 38 sdram_a7
T9 39 sdram_a8
T8 40 sdram_a9
AA2 28 sdram_a10
T10 41 sdram_a11
U3 42 sdram_a12
U9 26 sdram_ba0
Y4 27 sdram_ba1
U1 22 sdram_cas_n
R7 44 sdram_cke
Y3 24 sdram_cs_n
V4 23 sdram_ras_n
U4 21 sdram_we_n
AA6 46 sdram_clk_n
AA7 45 sdram_clk_p
Table 2–7. DDR SDRAM Pin Table (Continued)
FPGA Pin U63 Pin Board Net Name