Overview, Features overview, General description – Altera Nios Development Board Cyclone II Edition User Manual

Page 9: Chapter 1. overview, Features overview –1 general description –1

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Altera Corporation

1–1

May 2007

1. Overview

Features
Overview

The Nios Development Board, Cyclone II Edition, provides a hardware
platform for developing embedded systems based on Altera

®

Cyclone II

devices. The Nios Development Board, Cyclone II Edition provides the
following features:

Nios Development Board Cyclone II EditionA Cyclone II
EP2C35F672C5 or EP2C35F672C5N FPGA with 33,216 logic elements
(LE) and 483,840 bits of on-chip memory

16 MBytes of flash memory

2 MBytes of synchronous SRAM

32 MBytes of double data rate (DDR) SDRAM

On-board logic for configuring the FPGA from flash memory

On-board Ethernet MAC/PHY device and RJ45 connector

Two 5.0 V-tolerant expansion/prototype headers each with access to
41 FPGA user I/O pins

CompactFlash connector for Type I CompactFlash cards

32-bit PMC Connector capable of 33 MHz and 66 MHz operation

Mictor connector for hardware and software debug

RS-232 DB9 serial port

Four push-button switches connected to FPGA user I/O pins

Eight LEDs connected to FPGA user I/O pins

Dual 7-segment LED display

JTAG connectors to Altera devices via Altera download cables

50 MHz oscillator and zero-skew clock distribution circuitry

Power-on reset circuitry

General
Description

The Nios development board comes pre-programmed with a Nios II
processor reference design. Hardware designers can use the reference
design as an example of how to build systems using the Nios II processor
and to gain familiarity with the features included. Software designers can
use the pre-programmed Nios II processor design on the board to begin
prototyping software immediately.

This document describes the hardware features of the Nios development
board, including detailed pin-out information, to enable designers to
create custom FPGA designs that interface with all components on the
board. A complete set of schematics, a physical layout database, and
GERBER files for the development board are installed with the Nios II
development tools in the <Nios II EDS install path>/documents directory.

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