Altera Stratix II EP2S180 DSP Development Board - Manual (Page 20)

2–12 Core Version a.b.c variable Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual
Board Components
1
Clock Distribution 1 source can be either the oscillator (Y1) or an
external clock inserted using J10. To use an external clock signal,
remove the crystal oscillator from its socket. Note the correct
orientation of the oscillator before removing it to ensure you
reinstall it correctly for future use.
Board
Components The following sections describe the development board components.
Stratix II Device (U18)
The Stratix II EP2S180 device on the board features 71,760 , adaptive logic
modules (ALMs) in a (-3) speed grade 1020-pin FineLine BGA ® package.
The device has 9,383,040 total RAM bits.
f
For more information on Stratix II devices, refer to the Stratix II Device
Handbook.