Altera Stratix II EP2S180 DSP Development Board - Manual (Page 57)

Altera Corporation Core Version a.b.c variable 2–49
Stratix II EP2S180 DSP Development Board Reference Manual
Board Components & Interfaces
Expansion Prototype Connector (J26, J27, J28)
Headers J26, J27, and J28 collectively form a standard-footprint,
mechanically-stable connection that can be used (for example) as an
interface to a special-function daughter card.
The expansion prototype connector interface includes:
■ 41 I/O pins for prototyping. All 41 I/O pins connect to user I/O pins
on the Stratix II device. Each signal passes through analog switches
(U27, U28, U29, U30 and U31) to protect the Stratix II device from 5-V
logic levels. These analog switches are permanently enabled. The
output logic-level on the expansion prototype connector pins is
3.3 V.
■ A buffered, zero-skew copy of the on-board OSC output (from U2).
■ A buffered, zero-skew copy of the Stratix II device’s phase-locked
loop (PLL)-output (from U60).
■ A logic-negative, power-on reset signal.
■ Five regulated 3.3-V power-supply pins (2A total max load for both
expansion prototype connectors).
■ One regulated 5-V power-supply pin (1A total max load for both
expansion prototype connectors).
■ Numerous ground connections.
Figures 2–12 and 2–13 show connections from the expansion prototype to
the Stratix II device. Unless otherwise noted, the labels indicate Stratix II
device pin numbers.
Figure 2–12. Expansion Prototype Connector - J26, J27, J28
Pin 1
J26
J28
J27
Pin 1
Pin 1