Chapter 3 – DFI BT968 User Manual

Page 21

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Chapter 3 Hardware Installation

21

Chapter 3

Signal

Pin#

Module Pin Type Pwr Rail /Tolerance

BT968

Carrier Board

Description

ȟ

ȟ
ȟ
ȟ

USB Signals Descriptions

USB_0_1_OC#

B44

I CMOS

3.3V Suspend/3.3V

PU 10k to 3.3VSB

Connect to Overcurrent of USB Power Switch

USB over-current sense, USB channels 0 and 1. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.

USB_2_3_OC#

A44

I CMOS

3.3V Suspend/3.3V

PU 10k to 3.3VSB

Connect to Overcurrent of USB Power Switch

USB over-current sense, USB channels 2 and 3. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.

USB_4_5_OC#

B38

I CMOS

3.3V Suspend/3.3V

PU 10k to 3.3VSB

Connect to Overcurrent of USB Power Switch

USB over-current sense, USB channels 4 and 5. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.

USB_6_7_OC#

A38

I CMOS

3.3V Suspend/3.3V

PU 10k to 3.3VSB

Connect to Overcurrent of USB Power Switch

USB over-current sense, USB channels 6 and 7. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.

Signal

Pin#

Module Pin Type Pwr Rail /Tolerance

BT968

Carrier Board

Description

LVDS_A0+

A71

LVDS_A0-

A72

LVDS_A1+

A73

LVDS_A1-

A74

LVDS_A2+

A75

LVDS_A2-

A76

LVDS_A3+

A78

LVDS_A3-

A79

LVDS_A_CK+

A81

LVDS_A_CK-

A82

LVDS_B0+

B71

LVDS_B0-

B72

LVDS_B1+

B73

LVDS_B1-

B74

LVDS_B2+

B75

LVDS_B2-

B76

LVDS_B3+

B77

LVDS_B3-

B78

LVDS_B_CK+

B81

LVDS_B_CK-

B82

LVDS_VDD_EN

A77

O CMOS

3.3V / 3.3V

Connect to enable control of LVDS panel power circuit

LVDS panel power enable

LVDS_BKLT_EN

B79

O CMOS

3.3V / 3.3V

Connect to enable control of LVDS panel backlight power circuit.

LVDS panel backlight enable

LVDS_BKLT_CTRL

B83

O CMOS

3.3V / 3.3V

Connect to brightness control of LVDS panel backlight power circuit.

LVDS panel backlight brightness control

LVDS_I2C_CK

A83

I/O OD CMOS

3.3V / 3.3V

PU 2.2K to 3.3V

Connect to DDC clock of LVDS panel

I2C clock output for LVDS display use

LVDS_I2C_DAT

A84

I/O OD CMOS

3.3V / 3.3V

PU 2.2K to 3.3V

Connect to DDC data of LVDS panel

I2C data line for LVDS display use

Signal

Pin#

Module Pin Type Pwr Rail /Tolerance

BT968

Carrier Board

Description

LPC_AD0

B4

LPC_AD1

B5

LPC_AD2

B6

LPC_AD3

B7

LPC_FRAME#

B3

O CMOS

3.3V / 3.3V

LPC frame indicates the start of an LPC cycle

LPC_DRQ0#

B8

LPC_DRQ1#

B9

LPC_SERIRQ

A50

I/O CMOS

3.3V / 3.3V

LPC serial interrupt

LPC_CLK

B10

O CMOS

3.3V / 3.3V

LPC clock output - 33MHz nominal

ȟ

ȟ
ȟ
ȟ

3.3V / 3.3V

NA (No support)

O LVDS

LVDS

Connect to LVDS connector

O LVDS

LVDS

Connect to LVDS connector

I/O CMOS

3.3V / 3.3V

LVDS Channel B differential clock

LPC Signals Descriptions

Connect to LVDS connector

LVDS Channel B differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100ƻ terminations across the pairs at the destination. These

terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board

O LVDS

LVDS

Connect to LVDS connector

Connect to LVDS connector

O LVDS

LVDS

LVDS

Connect to LVDS connector

O LVDS

LVDS

LVDS Channel A differential clock

O LVDS

LVDS

Connect to LVDS connector

I CMOS

LVDS Signals Descriptions

O LVDS

LVDS

Connect to LVDS connector

LVDS Channel A differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100ƻ terminations across the pairs at the destination. These

terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board

O LVDS

Connect to LVDS connector

O LVDS

LVDS

Connect to LVDS connector

Connect to LPC device

LPC multiplexed address, command and data bus

O LVDS

LVDS

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