DFI CR902-B - Manual (Page 25)

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Chapter 3
Signal Pin# Pin Type Pwr Rail /Tolerance PU/PD Description
PWRBTN# B12 I CMOS 3.3V Suspend/3.3V
PU 10K: to 3.3V
Suspend
A falling edge creates a power button event. Power button events can
be used to bring a system out of S5 soft off and other suspend states,
as well as powering the system down.
SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V
PU 10K: to 3.3V
Suspend
Reset button input. Active low request for Module to reset and reboot.
May be falling edge sensitive. For situations when SYS_RESET# is
not able to reestablish control of the system, PWR_OK or a power
cycle may be used.
CB_RESET# B50 O CMOS 3.3V Suspend/3.3V PD 100K: to GND
Reset output from Module to Carrier Board. Active low. Issued by
Module chipset and may result from a low SYS_RESET# input, a low
PWR_OK input, a VCC_12V power input that falls below the minimum
specification, a watchdog timeout, or may be initiated by the Module
software.
PWR_OK B24 I CMOS 3.3V / 3.3V
Power OK from main power supply. A high value indicates that the
power is good. This signal can be used to hold off Module startup to
allow Carrier based FPGAs or other configurable devices time to be
programmed.
SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V Indicates imminent suspend operation; used to notify LPC devices.
SUS_S3# A15 O CMOS 3.3V Suspend/3.3V
Indicates system is in Suspend to RAM state. Active low output. An
inverted copy of SUS_S3# on the Carrier Board may be used to
enable the non-standby power on a typical ATX supply.
SUS_S4# A18 O CMOS 3.3V Suspend/3.3V Indicates system is in Suspend to Disk state. Active low output.
SUS_S5# A24 O CMOS 3.3V Suspend/3.3V Indicates system is in Soft Off state.
WAKE0# B66 I CMOS 3.3V Suspend/3.3V
PU 10K: to 3.3V
Suspend
PCI Express wake up signal.
WAKE1# B67 I CMOS 3.3V Suspend/3.3V
PU 10K: to 3.3V
Suspend General purpose wake up signal. May be used to implement wake-up
on PS2 keyboard or mouse activity.
BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V
PU 10K: to 3.3V
Suspend
Indicates that external battery is low.
This port provides a battery-low signal to the Module for orderly
transitioning to power saving or power cut-off ACPI modes.
Signal Pin# Pin Type Pwr Rail /Tolerance PU/PD Description
THRM# B35 I CMOS 3.3V / 3.3V PU 10K: to 3.3V Input from off-Module temp sensor indicating an over-temp situation.
THRMTRIP# A35 O CMOS 3.3V / 3.3V PU 10K: to 3.3V Active low output indicating that the CPU has entered thermal shutdown.
Signal Pin# Pin Type Pwr Rail /Tolerance PU/PD Description
SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K: to 3.3VSB System Management Bus bidirectional clock line.
SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K: to 3.3VSB System Management Bus bidirectional data line.
SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V PU 10K: to 3.3VSB
System Management Bus Alert – active low input can be used to
generate an SMI# (System Management Interrupt) or to wake the system.
Power and System Management Signals Descriptions
Thermal Protectiont Signals Descriptions
SM Bus Signals Descriptions