Measurement Computing PCI-DAS6013 - Manual (Page 17)

17
Chapter 3
Functional Details
Basic architecture
Figure 3 on page 19 shows a simplified block diagram of the PCI-DAS6013 and PCI-DAS6014. These boards
provide all of the functional elements shown in the figure.
The System Timing and Control (STC) is the logical center for all DAQ, DIO, and DAC (if applicable)
operations. It communicates over two major busses: a local bus and a memory bus.
The local bus carries digital I/O data and software commands from the PCI Bus Master. There are two Direct
Memory Access (DMA) channels provided for data transfers to the PC.
Primarily, the memory bus carries A/D and D/A (PCI-DAS6014 only) related data and commands. There are
three buffer memories provided on the memory bus:
 The queue buffer (8K configuration memory) stores programmed channel numbers, gains, and offsets.
 The ADC buffer (8K FIFO [First In, First Out]) temporarily stores scanned and converted analog inputs.
 The DAC 16K buffer stores data to be output as analog waveforms (this buffer function only applies to the
PCI-DAS6014).
Auxiliary input & output interface
Each board's 100-pin I/O connector provides six software-selectable inputs, and three software-selectable
outputs. The signals are user-configurable clocks, triggers and gates.
Refer to the " DAQ signal timing " section on page 20 for more explanation of these signals and their timing
requirements.
The following table lists all of the possible and the default signals you use on the nine pins. D/A signals pertain
only to the PCI-DAS6014.