7 hash table algorithm, Hash table algorithm -5, Ethernet address recognition flowchart -5 – Freescale Semiconductor POWERPC MPC860T User Manual

Page 25

Advertising
background image

MOTOROLA

Chapter 3. Fast Ethernet Controller Operation

3-5

PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE

broadcast address. If it is, the frame is accepted unconditionally; otherwise (multicast
address) a hash table lookup is performed using the 64-entry hash table deÞned in the hash
table registers.

In promiscuous mode (R_CNTRL[PROM] = 1), the FEC receives all the incoming frames
regardless of their address. In this mode the DA lookup is still performed and the MISS bit
in the RxBD is set accordingly. If address recognition did not achieve a match, the frame is
received with RxBD[MISS] set. If address recognition achieves a match the frame is
received without the MISS bit being set.

Figure 3-1. Ethernet Address Recognition Flowchart

3.7 Hash Table Algorithm

This section discusses the hash table process used in group hash Þltering. When the FEC
receives a frame with the destination address I/G bit set, the 48-bit address is mapped into
one of 64 bins, represented by the 64 bits in the two hash table registers. This is performed
by passing the 48-bit address through the on-chip 32-bit CRC generator and selecting 6 bits

Check Address

Receive Frame

Set Miss Bit

I/G Address

?

Receive Frame

Hash Match

?

Receive Frame

Receive Frame

Promiscuous

Discard Frame

Perfect Match

?

Broadcast

Address

?

G

I

False

True

False

True

False

True (R_CNTRL[PROM] = 1)

True

False

Mode

?

(R_CNTRL[PROM] = 1)

F

re

e

sc

a

le

S

e

m

ic

o

n

d

u

c

to

r,

I

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

n

c

.

..

Advertising