Freescale Semiconductor POWERPC MPC860T - Manual (Page 27)

MOTOROLA Chapter 3. Fast Ethernet Controller Operation 3-7
PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE
3.10 Internal and External Loopback
The FEC supports Both internal and external loopback. In loopback mode, both FIFOs are
used and the FEC operates in full-duplex fashion. Both internal and external loopback are
conÞgured through R_CNTRL[LOOP, DRT].
For internal loopback, set LOOP = 1 and DRT = 0. TX_EN and TX_ER are not asserted
during internal loopback.
For external loopback, set LOOP = 0 and DRT = 0. ConÞgure the external transceiver for
loopback.
3.11 Ethernet Error-Handling Procedure
The FEC reports frame reception and transmission error conditions using the FEC BDs and
the I_EVENT register.
3.11.1 Transmission Errors
Table 3-3 describes transmission errors.
3.11.2 Reception Errors
Table 3-4 describes reception errors.
Table 3-3. Transmission Errors
Error Description
Transmitter
Underrun
If this error occurs, the FEC sends 32 bits that ensure a CRC error and stops transmitting. All
remaining buffers for that frame are then ßushed and closed, with the UN bit set in the last TxBD for
that frame. The FEC continues to the next TxBD and begins transmitting the next frame.
Carrier Sense
Lost during
Frame
Transmission
When this error occurs and no collision is detected in the frame, the FEC sets the CSL bit in the last
TxBD for this frame. The frame is sent normally. No retries are performed as a result of this error.
The CSL bit is not set if X_CNTRL[FDEN] = 1, regardless of the state of CRS.
Retransmission
Attempts Limit
Expired
When this error occurs, the FEC terminates transmission. All remaining buffers for that frame are
then ßushed and closed, with the RL bit set in the last TxBD for that frame. The FEC then continues
to the next TxBD and begins sending the next frame.
Late Collision When this error occurs, the FEC stops sending. All remaining buffers for that frame are then ßushed
and closed, with the LC bit set in the last TxBD for that frame. The FEC then continues to the next
TxBD and begins sending the next frame.
Note: The deÞnition of what constitutes a late collision is hard-wired in the FEC.
Heartbeat Some transceivers have a self-test feature called heartbeat or signal-quality error. To signify a good
self-test, the transceiver indicates a collision within 20 clocks after the FEC sends a frame. This
heartbeat condition does not imply a real collision, but that the transceiver seems to work properly.
If X_CNTRL[HBC] = 1, X_CNTRL[FDEN]=0, and a heartbeat condition is not detected after a frame
transmission, a heartbeat error occursÑthe FEC closes the buffer, sets TxBD[HB], and generates
the HBERR interrupt if it is enabled.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
..