Freescale Semiconductor POWERPC MPC860T - Manual (Page 26)

3-6 MPC860T (Rev. D) Fast Ethernet Controller Supplement MOTOROLA
PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE
of the CRC-encoded result to generate a number between 0 and 63.
Bit 31 of the CRC result selects HASH_TABLE_HIGH (bit 31 = 1) or
HASH_TABLE_LOW (bit 31 = 0). Bits 30Ð26 of the CRC result select the bit in the
selected register. If that bit is set in the hash table, the frame is accepted; otherwise, it is
rejected. The result is that if eight group addresses are stored in the hash table and random
group addresses are received, the hash table prevents roughly 56/64 (or 87.5%) of the group
address frames from reaching memory. The processor must further Þlter those that reach
memory to determine if they truly contain one of the eight preferred addresses.
The effectiveness of the hash table declines as the number of addresses increases.
The user must initialize the hash table registers. The FEC does not support the SET GROUP
ADDRESS command, which can be used in CPM ethernet controllers. The user may compute
the hash for a particular address in software or use the SET GROUP ADDRESS command in an
off-line CPM channel, retrieve the result, and use it to program the FEC hash table registers.
The CRC32 polynomial to use in computing the hash is as follows:
3.8 Inter-Packet Gap Time
The minimum inter-packet gap time for back-to-back transmission is 96 bit times. After
completing a transmission or after the backoff algorithm completes, the transmitter waits
for the carrier sense signal (CRS) to be negated before starting its 96 bit time IPG counter.
Frame transmission may begin 96 bit times after CRS is negated if it stays negated for at
least 60 bit times. If CRS asserts during the last 36 bit times it is ignored and a collision
occurs.
The receiver receives back-to-back frames with a minimum spacing of at least 28 bit times.
If an interrupted gap between receive frames is less than 28 bit times, the receiver may
discard the next frame.
3.9 Collision Handling
If a collision occurs during frame transmission, the FEC continues transmitting for at least
32 bit times, sending a JAM pattern of 32 ones. If the collision occurs during the preamble
sequence, the JAM pattern is sent after the preamble sequence.
If a collision occurs within 64 byte times, the retry process is initiated. The transmitter waits
a random number of slot times. A slot time is 512 bit times. If a collision occurs after 64
byte times, no retransmission is performed and the end of frame buffer is closed with an LC
error indication.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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