Freescale Semiconductor POWERPC MPC860T - Manual (Page 28)

3-8 MPC860T (Rev. D) Fast Ethernet Controller Supplement MOTOROLA
PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE
Table 3-4. Reception Errors
Error Description
Overrun Error The FEC maintains an internal FIFO for receiving data. If a receiver FIFO overrun occurs, the FEC
closes the buffer and sets RxBD[OV].
Non-Octet
Error
(Dribbling Bits)
The FEC handles up to seven dribbling bits when the receive frame terminates nonoctet aligned and
it checks the CRC of the frame on the last octet boundary. If there is a CRC error, the frame nonoctet
aligned (NO) error is reported in the RxBD. If there is no CRC error, no error is reported.
CRC Error When a CRC error occurs with no dribbling bits, the FEC closes the buffer and sets RxBD[CR]. CRC
checking cannot be disabled, but the CRC error can be ignored if checking is not required.
Frame Length
Violation
When the receive frame length exceeds R_HASH[MAX_FRAME_LENGTH], I_EVENT[BABR] is set
indicating babbling receive error, and the LG bit in the end of frame RxBD is set.
Note: Receive frames exceeding 2047 bytes are truncated.
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