Figure67 . r_buff_size register, Table68 . r_buff_size field descriptions, 8 ethernet control register (ecntrl) – Freescale Semiconductor POWERPC MPC860T User Manual
Page 39: Figure68 . ecntrl register, Ethernet control register (ecntrl) -7, R_buff_size register -7, Ecntrl register -7, R_buff_size field descriptions -7, Freescale semiconductor, inc, Table 6-8 describes r_b uff_size þelds
MOTOROLA
Chapter 6. Programming Model
6-7
PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE
Table 6-8 describes R_BUFF_SIZE Þelds.
6.2.8 Ethernet Control Register (ECNTRL)
The Ethernet control register (ECNTRL), shown in Figure 6-8, is used to enable and disable
the FEC. It is written by the user and cleared at system reset.
Bits
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Field
Ñ
Reset
UndeÞned
R/W
Read/write
Addr
0xE18
Bits
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Field
Ñ
R_BUFF_SIZE
Ñ
Reset
UndeÞned
R/W
Read/write
Addr
0xE1A
Figure 6-7. R_BUFF_SIZE Register
Table 6-8. R_BUFF_SIZE Field Descriptions
Bits
Name
Description
0Р20
С
Reserved. Should be written to zero by the host processor.
21Ð27
R_BUFF_SIZE
Receive buffer size.
28Р31
С
Reserved. Should be written to zero by the host processor.
Bits
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Field
Ñ
Reset
0000_0000_0000_0000
R/W
Read/write
Addr
0xE40
Bits
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Field
SPARE
FEC_PIN
MUX
ETHER_EN RESET
Reset
0000_0000_0000_0000
R/W
Read/write
Addr
0xE42
Figure 6-8. ECNTRL Register
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