Intel SE8500HW4 - Manual (Page 74)

Electrical Specifications Intel® Server Board Set SE8500HW4
Revision 1.0
Intel order number D22893-001
62
8.5 Clocks
The Intel ® Server Board Set SE8500HW4 clock tree is generated from a single CK409 with
spread spectrum capability. The CK409 generates multiple copies of differential pair high-speed
clocks. Low skew DB800 buffers generate additional copies.
The FSB clocks must be length-matched. Skew control is also required on the 166HMz MPCLK
going to the XMBs and NB, the 66MHz Hub link clocks, and the legacy / LPC 33MHz clocks.
Spread spectrum capability is enabled via an I
2 C access to the CK409, which is connected to
the ICH5’s I 2 C bus and controlled by the system BIOS.