Figures – National Instruments Isolated Analog Input Device NI PXI-4224 User Manual
Page 7

Contents
© National Instruments Corporation
vii
Figures
NI PXI-4224 Front Label ......................................................................2-3
Block Diagram of NI PXI-4224 ............................................................4-2
Effect of Input Impedance on Signal Measurements ............................4-4
AI CONV CLK Signal Routing ............................................................4-6
NI PXI-4224 PXI Trigger Bus Signal Connection................................4-8
Typical Program Flowchart...................................................................5-2
General Synchronizing Flowchart.........................................................5-9
PXI-4224 Dimensions ...........................................................................A-4
Typical Posttriggered Sequence ............................................................B-2
Typical Pretriggered Sequence..............................................................B-2
AI START TRIG Input Signal Timing .................................................B-3
AI START TRIG Output Signal Timing...............................................B-3
AI REF TRIG Input Signal Timing.......................................................B-4
AI REF TRIG Output Signal Timing ....................................................B-5
AI SAMP CLK Input Signal Timing ....................................................B-6
AI SAMP CLK Output Signal Timing..................................................B-6
AI CONV CLK Input Signal Timing ....................................................B-7
AI CONV CLK Output Signal Timing .................................................B-8
AI SAMPLE CLK TIMEBASE Signal Timing ....................................B-9
AI HOLD COMPLETE Signal Timing.................................................B-10
Injector/Ejector Handle Position Before Device Removal....................C-2