NXP Semiconductors PCA9665 User Manual
Pca9665, General description, Features
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Table of contents
Document Outline
- 1. General description
- 2. Features
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 General
- 7.2 Internal oscillator
- 7.3 Registers
- 7.3.1 Direct registers
- 7.3.2 Indirect registers
- 7.3.2.1 The Byte Count register, I2CCOUNT (indirect address 00h)
- 7.3.2.2 The Own Address register, I2CADR (indirect address 01h)
- 7.3.2.3 The Clock Rate registers, I2CSCLL and I2CSCLH (indirect addresses 02h and 03h)
- 7.3.2.4 The Time-out register, I2CTO (indirect address 04h)
- 7.3.2.5 The Parallel Software Reset register, I2CPRESET (indirect address 05h)
- 7.3.2.6 The I2C-bus mode register, I2CMODE (indirect address 06h)
- 8. PCA9665 modes
- 8.1 Configuration modes
- 8.2 Operating modes
- 8.3 Byte mode
- 8.4 Buffered mode
- 8.5 Buffered mode examples
- 8.6 I2CCOUNT register
- 8.7 Acknowledge management (I2C-bus addresses and data) in Byte and Buffered modes
- 8.8 Miscellaneous states
- 8.9 Some special cases
- 8.10 Power-on reset
- 8.11 Reset
- 8.12 I2C-bus timing diagrams, Unbuffered mode
- 8.13 I2C-bus timing diagrams, Buffered mode
- 9. Characteristics of the I2C-bus
- 10. Application design-in information
- 11. Limiting values
- 12. Static characteristics
- 13. Dynamic characteristics
- 14. Test information
- 15. Package outline
- 16. Handling information
- 17. Soldering
- 18. Abbreviations
- 19. Revision history
- 20. Legal information
- 21. Contact information
- 22. Contents