Edma module and edma selector – Texas Instruments TMS320C6712D User Manual

Page 44

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TMS320C6712D

FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR

SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005

44

POST OFFICE BOX 1443

HOUSTON, TEXAS 77251−1443

EDMA module and EDMA selector

The C67x EDMA for this device also supports up to 16 EDMA channels. Four of the sixteen channels (channels
8−11) are reserved for EDMA chaining, leaving 12 EDMA channels available to service peripheral devices. On
this device, the user, through the EDMA selector registers, can control the EDMA channels servicing peripheral
devices.

The EDMA selector registers are located at addresses 0x01A0FF00 (ESEL0), 0x01A0FF04 (ESEL1), and
0x01A0FF0C (ESEL3). These EDMA selector registers control the mapping of the EDMA events to the EDMA
channels. Each EDMA event has an assigned EDMA selector code (see Table 22). By loading each EVTSELx
register field with an EDMA selector code, users can map any desired EDMA event to any specified EDMA
channel. Table 21 lists the default EDMA selector value for each EDMA channel.

See Table 21 and Table 22 for the EDMA Event Selector registers and their associated bit descriptions.

Table 21. EDMA Channels

Table 22. EDMA Selector

EDMA

CHANNEL

EDMA

SELECTOR

CONTROL

REGISTER

DEFAULT

SELECTOR

VALUE

(BINARY)

DEFAULT

EDMA

EVENT

EDMA

SELECTOR

CODE (BINARY)

EDMA

EVENT

MODULE

0

ESEL0[5:0]

000000

000000

Reserved

1

ESEL0[13:8]

000001

TINT0

000001

TINT0

TIMER0

2

ESEL0[21:16]

000010

TINT1

000010

TINT1

TIMER1

3

ESEL0[29:24]

000011

SDINT

000011

SDINT

EMIF

4

ESEL1[5:0]

000100

GPINT4

000100

GPINT4

GPIO

5

ESEL1[13:8]

000101

GPINT5

000101

GPINT5

GPIO

6

ESEL1[21:16]

000110

GPINT6

000110

GPINT6

GPIO

7

ESEL1[29:24]

000111

GPINT7

000111

GPINT7

GPIO

8

TCC8 (Chaining)

001000

Reserved

9

TCC9 (Chaining)

001001

Reserved

10

TCC10 (Chaining)

001010

GPINT2

GPIO

11

TCC11 (Chaining)

001011

Reserved

12

ESEL3[5:0]

001000

XEVT0

001100

XEVT0

McBSP0

13

ESEL3[13:8]

001001

REVT0

001101

REVT0

McBSP0

14

ESEL3[21:16]

001010

XEVT1

001110

XEVT1

McBSP1

15

ESEL3[29:24]

001011

REVT1

001111

REVT1

McBSP1

010000−111111

Reserved

† The GPINT[4−7] interrupt events are sourced from the GPIO module via the external interrupt capable GP[4−7] pins.

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