Texas Instruments TMS320C6712D - Manual (Page 72)

TMS320C6712D
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
72 POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251−1443
ASYNCHRONOUS MEMORY TIMING (CONTINUED)
Setup = 2 Strobe = 3 Not Ready Hold = 2
BE
Address
Write Data
10 10
9 11
9 8
9 8
9 8
7 7
6 6
ECLKOUT
CEx
EA[21:2]
ED[31:0]
BE[3:0]
ARDY
AOE/SDRAS/SSOE†
ARE/SDCAS/SSADS†
AWE/SDWE/SSWE†
† AOE/SDRAS/SSOE, ARE/SDCAS/SSADS, and AWE/SDWE/SSWE operate as AOE (identified under select signals), ARE, and AWE,
respectively, during asynchronous memory accesses.
Figure 27. Asynchronous Memory Write Timing