Xilinx LogiCore PLB PCI Full Bridge User Manual
Ea rl y ac cess, Plb pci full bridge (v1.00a)
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Table of contents
Document Outline
- PLB PCI Full Bridge (v1.00a)
- Introduction
- Features
- System Reset
- Evaluation Version
- Functional Description
- LogiCore Version 3.0 32-bit PCI Core Requirements
- Bus Interface Parameters
- PLB PCI Bus Interface I/O Signals
- Port and Parameter Dependencies
- Supported PCI Bus Commands
- PLB PCI Bridge Register Descriptions
- Register and Parameter Dependencies
- PLB PCI Bridge Interrupt Registers Descriptions
- PLB PCI Bridge Reset Register Description
- Configuration Address Port Register Description
- Configuration Data Port Register Description
- Bus Number/Subordinate Bus Number Register Description
- IPIFBAR2PCIBAR_N High-Order Bits Register Description
- Host Bridge Device Number Register Description
- PLB PCI Transactions
- Configuration Transactions
- Design Implementation
- Reference Documents
- Revision History