Sample configuration task defining interrupts – Rockwell Automation 57C419 5V-24V DC Input Module User Manual

Page 45

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EĆ7

Sample Configuration Task Defining Interrupts

The following is an example of a configuration task for an input module defining

interrupts:

1000

!

1001

!

Interrupt status and control register (used by

1002

!

the operating system)

1005

IODEF ISCR%[ SLOT=4, REGISTER=2]

1010

!

1011

!

Interrupt enables (one per bit) 0=disable, 1-enable

1012

!

1015

IODEF INTRP ENABLE B17@[SLOT=4, REGISTER=2, BIT=6]

1016

IODEF INTRP ENABLE B18@[SLOT=4, REGISTER=2, BIT=5]

1017

IODEF INTRP ENABLE B19@[SLOT=4, REGISTER=2, BIT=4]

1018

IODEF INTRP ENABLE B20@[SLOT=4, REGISTER=2, BIT=3]

1020

!

1021

!

Latch status (one per bit) 1=being asserted

1022

!

1025

IODEF LATCH STATUS B17@[SLOT=4, REGISTER=2, BIT=8]

1026

IODEF LATCH STATUS B18@[SLOT=4, REGISTER=2, BIT=9]

1027

IODEF LATCH STATUS B19@[SLOT=4, REGISTER=2, BIT=10]

1028

IODEF LATCH STATUS B20@[SLOT=4, REGISTER=2, BIT=11]

1030

!

1031

!

Latch edge transition selection (one per bit)

1032

!

0 = Off to on, 1 = On to off

1033

!

1034

IODEF LATCH EDGE B17@[SLOT=4, REGISTER=3, BIT=0]

1036

IODEF LATCH EDGE B18@[SLOT=4, REGISTER=3, BIT=1]

1037

IODEF LATCH EDGE B19@[SLOT=4, REGISTER=3, BIT=2]

1038

IODEF LATCH EDGE B20@[SLOT=4, REGISTER=3, BIT=3]

1040

!

1041

!

Latch reset (one per bit)

1042

!

write 0 = reset status

1043

!

1045

IODEF LATCH RESET B17@[SLOT=4, REGISTER=3, BIT=8]

1046

IODEF LATCH RESET B18@[SLOT=4, REGISTER=3, BIT=9]

1047

IODEF LATCH RESET B19@[SLOT=4, REGISTER=3, BIT=10]

1048

IODEF LATCH RESET B20@[SLOT=4, REGISTER=3, BIT=11]

32767 END

This configuration defines all of the information available on the module. If fewer

than four interrupts are used, the unused definitions should be deleted.

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