Rockwell Automation SA500 Diagnostics, Troubleshooting Guide - Manual (Page 18)

3-2 SA500 Diagnostics, Troubleshooting, and Start-Up Guidelines
Before the control algorithm(s) can be executed, all of the following conditions must be
met:
• The interlock tests, register 205/1205, must be passed successfully. See
section 2.3.
• The M-contactor must be closed, if configured. See section 2.4.1.2.
• The UDC task in the AutoMax rack must be running. The status of the UDC task is
indicated by the UDC Task Running bit (register 100/1100, bit 15, UDC_RUN@).
If any of these requirements are not met or if a fault is latched in the Drive Fault
register (202/1202), the PMI will remain in the idle mode.
If these requirements are met, the PMI will execute the torque minor loop, and if
selected, the speed and position minor loops. At this time, the PMI will set the PMI On
bit (200/1200, bit 0, PMI_ON@) to indicate that the torque minor loop is executing.
Important: Note that if a brushless motor is being used, the resolver and rotor shafts
must be aligned before the torque minor loop is executed or the motor
may not run properly. This is not tested by the Interlock tests as a
requirement to enter the PMI run mode. See section 3.3 for description of
this procedure.
The torque minor loop executes until one of the following occurs:
• The PMI Run Enable bit (register 100/1100, bit 0, PMI_RUN@) is reset by the
application task.
• A drive fault is detected. Refer to Appendix A for a description of the Drive Fault
register.
• The RPI signal (register 201/1201, bit 0) is removed.
The speed minor loop executes until one of the following occurs:
• The Speed Loop Enable bit (register 100/1100, bit 3, SPD_ON@) is reset by the
application task.
• The PMI Run Enable bit (register 100/1100, bit 0, PMI_RUN@) is reset by the
application task.
• A drive fault is detected. Refer to Appendix A for a description of the Drive Fault
register.
• The RPI signal (register 201/1201, bit 0) is removed.
The position minor loop executes until one of the following occurs:
• The Position Loop Enable bit (register 100/1100, bit 4, POS_ON@) is reset by the
application task.
• The Speed Loop Enable bit (register 100/1100, bit 3, SPD_ON@) is reset by the
application task.
• The PMI Run Enable bit (register 100/1100, bit 0, PMI_RUN@) is reset by the
application task.