Rockwell Automation SA500 Diagnostics, Troubleshooting Guide - Manual (Page 39)

Drive Fault Register A-3
PMI Bus Fault Bit 13
The PMI Bus Fault bit is set if a problem is
detected with the address and data bus on
the PMI regulator board in the Power
Module
+H[ 9DOXH +
6XJ 9DU 1DPH )/7B%86#
$FFHVV 5HDG RQO\
8'& (UURU &RGH 
/(' 1$
UDC Run Fault Bit 14
The UDC Run Fault bit is set if the UDC task
stops while the minor loop is running in the
PMI. +H[ 9DOXH +
6XJ 9DU 1DPH )/7B581#
$FFHVV 5HDG RQO\
8'& (UURU &RGH 
/(' 1$
Communication Lost Fault Bit 15
The Communication Lost Fault bit is set if
the fiber-optic communication between the
PMI Processor and the UDC module is lost
due to two consecutive errors of any type.
+H[ 9DOXH +
6XJ 9DU 1DPH )/7B&20#
$FFHVV 5HDG RQO\
8'& (UURU &RGH 
/(' &200 2.
This bit is set only after communication between the PMI Regulator and UDC
module has been established. This bit should be used in the run permissive logic for
the drive. Also refer to the CCLK Synchronized bit (register 200/1200, bit 14).