Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement - Manual (Page 24)

High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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RGSL
Bit 1
Ring Oscillator Select. This bit selects the clock source following a resume from
Stop mode. Using the ring oscillator to resume from Stop mode allows almost
instantaneous startup. This bit is cleared to 0 after a power-on reset, and
unchanged by all other forms of reset. The state of this bit will be undefined on
devices that do not incorporate a ring oscillator.
0 = The device will hold operation until the crystal oscillator has warmed-up.
1 = The device will begin operating from the ring oscillator, and when the crystal
warm-up is complete, will switch to the external clock source or oscillator.
BGS
Bit 0 Bandgap Select. This bit enables/disables the band-gap reference during Stop
mode. Disabling the bandgap reference provides significant power savings in
Stop mode, but sacrifices the ability to perform a power fail interrupt or power-
fail reset while stopped. This bit can only be modified with a timed-access
procedure.
0 =The bandgap reference is disabled in Stop mode but will function during
normal operation.
1 = The bandgap reference will operate in Stop mode.
PORT 4 CONTROL REGISTER (P4CNT)
7 6 5 4 3 2 1 0
SFR 92h 1 SBCAN P4CNT.5 P4CNT.4 P4CNT.3 P4CNT.2 P4CNT.1 P4CNT.0
R-1 RT-0 RT-1 RT-1 RT-1 RT-1 RT-1 RT-1
R = Unrestricted Read, T = Timed Access Write Only, -n = Value after Reset
P4.7-0 Port 4 Control Register. This register controls the alternate addressing modes
function of Port 4. Programming this register as shown below will assign the
alternate functions of Port 4. The associated Port 4 SFR bit must be programmed to
a logic one before the pin can be used in its alternate function capacity.
Bit 7 Reserved
SBCAN
Bit 6 Single Bus CAN. Setting this bit connects both CAN receive inputs (C0RX and
C1RX) to P5.1 and drives P5.0 with the logical AND of both CAN transmit outputs
(C0TX and C1TX). SBCAN=0 disables the feature and allows the CAN modules to
receive/transmit through their respective bus pins. This can be used to create a
single “super” CAN module with 30 message centers.
P4CNT.5–
P4CNT.3
Port Pin P4.7–4 Configuration Control Bits. Bits 5-0 configure the external
memory control signals. P4CNT.5-3 determine whether specific P4 pins function as
A19-A16 or I/O. The number of external address lines enabled establishes the range
for each program chip enable (
3 0 CE − ) and data chip enable ( 3 0 PCE − ). When
P4CNT.5-3=000b, 3 CE 0 CE − are decoded on 32KB block boundaries.
Port 4 Pin Function
P4CNT.5–3 P4.7 P4.6 P4.5 P4.4
Max. Memory
Size per CEx
000 I/O I/O I/O I/O 32 kbytes
100 I/O I/O I/O A16 128 kbytes
101 I/O I/O A17 A16 256 kbytes