Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement - Manual (Page 97)

High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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Figure 6-2. EXTERNAL PROGRAM/DATA MEMORY MAP (INTERNAL SRAM STILL AT
DEFAULT ADDRESSES)
In the case of the DS80C390, we must also consider the on-chip memory that is present and how/where
this memory should fit into our memory map. The DS80C390 contains the following internal memory:
(2) 256 x 8 RAMs that can be used as data, message center memory for the two CAN2.0B
controllers
(1) 1k x 8 RAM that can be used as data, stack, program
(1) 3k x 8 RAM that can be used as data, program
For this example, we will use the (2) 256 x 8 RAMs to support CAN activity, the 1k x 8 RAM as
dedicated stack memory, and the 3k x 8 RAM exclusively as MOVX data space. We also define the
logical address of the internal RAM to the high range (400000h–4011FFh) so that it does not overlap
external data memory (000000h–0FFFFFh). Figure 6-3 is the final memory map reflecting our
assignments for internal memory.
CE0
=512k x 8
CE1
=512k x 8
PROGRAM
MEMORY
DATA
MEMORY
PCE0
=512k x 8
PCE1
=512k x 8
PCE2
=512k x 8
000000h
0FFFFFh
080000h
07FFFFh
000000h
100000h
0FFFFFh
080000h
07FFFFh
17FFFFh
INTERNAL
4kB SRAM
(1kB is stack)
INTERNAL
512-byte SRAM
(CAN0, CAN1)
00FFFFh
00F000h
00EFFFh
00EE00h