ADLINK PCI-9810 - Manual (Page 37)

Registers 25
FIFO Control Register
Controls the onboard FIFO memory.
Address: BASE + 18h
Attribute: Write
Data Format:
Bit 7 6 5 4 3 2 1 0
BASE+18h — — — — — — CLRTRG CLRFIFO
BASE+19h — — — — — — — —
BASE+1Ah — — — — — — — —
BASE+1Bh — — — — — — — —
Bit 0 CLRFIFO, clear the onboard FIFO
When a “1” is written to this bit, the entire onboard FIFO is
cleared.
Bit 1 CLRTRG, clear trigger detection flag
When a “1” is written to this bit, the trigger detection bit is
cleared.
Bit 2..31 Any value