9812_set_clk_rate – ADLINK PCI-9810 User Manual
Page 69
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Function Reference
57
_9812_Set_Clk_Rate
Description
Specifies the clock divider for the ADC clock. The value of the
clock divider must be even and between 2 to 65534.
Syntax
C/C++ (DOS)
int _9812_Set_Clk_Rate (int card_number, U16
clk_div)
C/C++ (Windows 95)
int W_9812_Set_Clk_Rate (int card_number, U16
clk_div)
Visual Basic (Windows 95)
W_9812_Set_Clk_Rate (ByVal card_number As Long,
ByVal clk_div As Integer) As Long
Argument(s)
card_number
The card number of the selected card.
clk_div
ADC clock divisor. The value must be an even
number and the minimum value is 2.
Return Code(s)
PCICardNumErr
PCICardNotInit
InvalidClkDiv,NoError
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