ADLINK CoreModule 920 - Manual (Page 17)

Chapter 2 Product Overview
CoreModule 920 Reference Manual 11
Major Component (ICs) Definitions
Table 2-1 lists the major ICs, including a brief description of each, on the CoreModule 920. Figures 2-3 and
2-4 show the locations of the major ICs.
Table 2-1. Major Component Descriptions and Functions
Chip Type Mfg. Model Description Function
CPU (U1) Intel Core  i7, 3517UE,
1.7GHz (17W)
Central Processing
Unit with 2
execution cores and
up to 8MB L3 cache Integrates
Processor Core
and Graphics
Memory
Controller Hub
DDR3 SDRAM
(U3, U5, U8, U10,
U11 [to enable
ECC]) Hynix H5TQ2G83BFR-H9 On-board DDR3
256M x 8 System
Memory Provides high-
speed data
transfer
DDR3 SDRAM
(U4, U6, U7, U9 - on
bottom side [see
Figure 2-4 ])
Hynix H5TQ2G83BFR-H9 On-board DDR3
256M x 8 System
Memory Provides high-
speed data
transfer
PCH [Platform
Controller Hub
(U12)] Intel BD82QM67
(PCH) I/O Hub for
common user
interfaces Provides
Southbridge
interfaces and
off loads some
Northbridge
functions from
the CPU
Gigabit Ethernet
PHY Transceiver
(U14) Intel 82579LM Single-port Gigabit
Ethernet PHY
Transceiver for
GLAN1 interface Provides a
standard IEEE
802.3 Ethernet
interface for
Ethernet transfer
rates up to 1000
Mb/s
Gigabit Ethernet
Controller (U15) Intel 82574IT Gigabit Ethernet
controller for
GLAN2 interface Generates PCIe
10T/100TX/
1000T Ethernet
signals
Ethernet EEPROM
(U16) Atmel AT25128B-SSHL-B Three-Wire Serial
EEPROM for
Gigabit Ethernet
Controller Provides storage
for MAC
addresses, serial
numbers, and
pre-boot
configuration
data
PCIe-to-PCI Bridge
(U17) Texas
Instruments XIO2001IPNP PCIe-to-PCI
interface Migrates legacy
PCI interfaces
LPC-to-UART
Controller (U18) Fintek F81216AU-I Serial
communication
controller Provides 4
UART ports
through the LPC
bus